[PATCH v1 1/1] lib: sbi: Add support for smcsrind and smcdeleg
Atish Patra
atishp at rivosinc.com
Sun Mar 3 22:53:51 PST 2024
On 3/3/24 20:52, Anup Patel wrote:
> On Sat, Feb 17, 2024 at 5:36 AM Atish Patra <atishp at rivosinc.com> wrote:
>> Smcsrind allows generic indirect CSR access mechanism while
>> Smcdeleg allows delegating hpmcounters in Supervisor mode.
>>
>> Enable both extensions and set the appropriate bits in mstateen
>> and menvcfg.
>>
>> Co-developed-by: Kaiwen Xue <kaiwenxue1 at gmail.com>
>> Signed-off-by: Atish Patra <atishp at rivosinc.com>
>> ---
>> include/sbi/riscv_encoding.h | 25 ++++++++++++++++++++++---
>> include/sbi/sbi_hart.h | 8 ++++++++
>> lib/sbi/sbi_hart.c | 16 ++++++++++++----
>> 3 files changed, 42 insertions(+), 7 deletions(-)
>>
>> diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
>> index e74cc0df1c40..57aabd665589 100644
>> --- a/include/sbi/riscv_encoding.h
>> +++ b/include/sbi/riscv_encoding.h
>> @@ -209,6 +209,7 @@
>>
>> #define ENVCFG_STCE (_ULL(1) << 63)
>> #define ENVCFG_PBMTE (_ULL(1) << 62)
>> +#define ENVCFG_CDE (_UL(1) << 60)
> This needs to be _ULL(1) otherwise it breaks compilation on RV32.
> I have taken care of this at the time of merging this patch.
>
> Please fix your work-flow and always test on both RV32 and RV64.
This was a typo. Apologies for the oversight.
I will make sure to verify on both RV32/RV64 next time.
Regards,
Atish
> Regards,
> Anup
>
>> #define ENVCFG_CBZE (_UL(1) << 7)
>> #define ENVCFG_CBCFE (_UL(1) << 6)
>> #define ENVCFG_CBIE_SHIFT 4
>> @@ -314,6 +315,9 @@
>> /* Supervisor Configuration */
>> #define CSR_SENVCFG 0x10a
>>
>> +/* Supervisor Conter Inhibit */
>> +#define CSR_SCOUNTINHIBIT 0x120
>> +
>> /* Supervisor Trap Handling */
>> #define CSR_SSCRATCH 0x140
>> #define CSR_SEPC 0x141
>> @@ -328,9 +332,14 @@
>> /* Supervisor Protection and Translation */
>> #define CSR_SATP 0x180
>>
>> -/* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
>> +/* Supervisor Indirect Register Alias */
>> #define CSR_SISELECT 0x150
>> #define CSR_SIREG 0x151
>> +#define CSR_SIREG2 0x152
>> +#define CSR_SIREG3 0x153
>> +#define CSR_SIREG4 0x155
>> +#define CSR_SIREG5 0x156
>> +#define CSR_SIREG6 0x157
>>
>> /* Supervisor-Level Interrupts (AIA) */
>> #define CSR_STOPEI 0x15c
>> @@ -391,9 +400,14 @@
>> #define CSR_HVIPRIO1 0x646
>> #define CSR_HVIPRIO2 0x647
>>
>> -/* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */
>> +/* Virtual Supervisor Indirect Alias */
>> #define CSR_VSISELECT 0x250
>> #define CSR_VSIREG 0x251
>> +#define CSR_VSIREG2 0x252
>> +#define CSR_VSIREG3 0x253
>> +#define CSR_VSIREG4 0x255
>> +#define CSR_VSIREG5 0x256
>> +#define CSR_VSIREG6 0x257
>>
>> /* VS-Level Interrupts (H-extension with AIA) */
>> #define CSR_VSTOPEI 0x25c
>> @@ -694,9 +708,14 @@
>> #define CSR_DSCRATCH0 0x7b2
>> #define CSR_DSCRATCH1 0x7b3
>>
>> -/* Machine-Level Window to Indirectly Accessed Registers (AIA) */
>> +/* Machine Indirect Register Alias */
>> #define CSR_MISELECT 0x350
>> #define CSR_MIREG 0x351
>> +#define CSR_MIREG2 0x352
>> +#define CSR_MIREG3 0x353
>> +#define CSR_MIREG4 0x355
>> +#define CSR_MIREG5 0x356
>> +#define CSR_MIREG6 0x357
>>
>> /* Machine-Level Interrupts (AIA) */
>> #define CSR_MTOPEI 0x35c
>> diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
>> index 10dc3df5d2fc..cc78eec6f65a 100644
>> --- a/include/sbi/sbi_hart.h
>> +++ b/include/sbi/sbi_hart.h
>> @@ -55,6 +55,14 @@ enum sbi_hart_extensions {
>> SBI_HART_EXT_SVPBMT,
>> /** Hart has debug trigger extension */
>> SBI_HART_EXT_SDTRIG,
>> + /** Hart has Smcsrind extension */
>> + SBI_HART_EXT_SMCSRIND,
>> + /** Hart has Smcdeleg extension */
>> + SBI_HART_EXT_SMCDELEG,
>> + /** Hart has Sscsrind extension */
>> + SBI_HART_EXT_SSCSRIND,
>> + /** Hart has Ssccfg extension */
>> + SBI_HART_EXT_SSCCFG,
>>
>> /** Maximum index of Hart extension */
>> SBI_HART_EXT_MAX,
>> diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
>> index a0ab0c640035..3d1369441c05 100644
>> --- a/lib/sbi/sbi_hart.c
>> +++ b/lib/sbi/sbi_hart.c
>> @@ -95,11 +95,16 @@ static void mstatus_init(struct sbi_scratch *scratch)
>> mstateen_val |= SMSTATEEN0_HSENVCFG;
>>
>> if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMAIA))
>> - mstateen_val |= (SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
>> - SMSTATEEN0_IMSIC);
>> + mstateen_val |= (SMSTATEEN0_AIA | SMSTATEEN0_IMSIC);
>> else
>> - mstateen_val &= ~(SMSTATEEN0_AIA | SMSTATEEN0_SVSLCT |
>> - SMSTATEEN0_IMSIC);
>> + mstateen_val &= ~(SMSTATEEN0_AIA | SMSTATEEN0_IMSIC);
>> +
>> + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMAIA) ||
>> + sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCSRIND))
>> + mstateen_val |= (SMSTATEEN0_SVSLCT);
>> + else
>> + mstateen_val &= ~(SMSTATEEN0_SVSLCT);
>> +
>> csr_write(CSR_MSTATEEN0, mstateen_val);
>> #if __riscv_xlen == 32
>> csr_write(CSR_MSTATEEN0H, mstateen_val >> 32);
>> @@ -129,6 +134,7 @@ static void mstatus_init(struct sbi_scratch *scratch)
>> __set_menvcfg_ext(SBI_HART_EXT_SVPBMT, ENVCFG_PBMTE)
>> #endif
>> __set_menvcfg_ext(SBI_HART_EXT_SSTC, ENVCFG_STCE)
>> + __set_menvcfg_ext(SBI_HART_EXT_SMCDELEG, ENVCFG_CDE);
>>
>> #undef __set_menvcfg_ext
>>
>> @@ -658,6 +664,8 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
>> __SBI_HART_EXT_DATA(zicbom, SBI_HART_EXT_ZICBOM),
>> __SBI_HART_EXT_DATA(svpbmt, SBI_HART_EXT_SVPBMT),
>> __SBI_HART_EXT_DATA(sdtrig, SBI_HART_EXT_SDTRIG),
>> + __SBI_HART_EXT_DATA(smcsrind, SBI_HART_EXT_SMCSRIND),
>> + __SBI_HART_EXT_DATA(smcdeleg, SBI_HART_EXT_SMCDELEG),
>> };
>>
>> /**
>> --
>> 2.34.1
>>
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