[PATCH 2/2] lib: sbi: sse: Fix a6 and a7 register content upon injection

[Anup Patel]

On Mon, Nov 25, 2024 at 4:24 PM Clément Léger <cleger at rivosinc.com> wrote:
>
> The specification states that a6 contains the current hart id and a7
> contains the entry argument. This was inverted in the current
> implementation.
>
> Reported-by: Andrew Jones <andrew.jones at linux.dev>
> Signed-off-by: Clément Léger <cleger at rivosinc.com>

LGTM.

Reviewed-by: Anup Patel <anup at brainfault.org>

Applied this patch to the riscv/opensbi repo.

Thanks,
Anup

> ---
>  lib/sbi/sbi_sse.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
> index bf5620e..c9f9a9d 100644
> --- a/lib/sbi/sbi_sse.c
> +++ b/lib/sbi/sbi_sse.c
> @@ -509,8 +509,8 @@ static void sse_event_inject(struct sbi_sse_event *e,
>         csr_write(CSR_SEPC, regs->mepc);
>
>         /* Setup entry context */
> -       regs->a6 = e->attrs.entry.arg;
> -       regs->a7 = current_hartid();
> +       regs->a6 = current_hartid();
> +       regs->a7 = e->attrs.entry.arg;
>         regs->mepc = e->attrs.entry.pc;
>
>         /* Return to S-mode with virtualization disabled */
> --
> 2.45.2
>
>
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