[PATCH 2/2] Makefile: Don't enable V-extension using -march option

Anup Patel anup at brainfault.org
Mon Dec 9 21:17:50 PST 2024


On Tue, Dec 10, 2024 at 10:38 AM Jessica Clarke <jrtc27 at jrtc27.com> wrote:
>
> On 10 Dec 2024, at 04:16, Anup Patel <apatel at ventanamicro.com> wrote:
> >
> > Enabling V-extension using -march option causes OpenSBI boot-time
> > hang with LLVM compiler.
> >
> > As a work-around, don't enable V-extension using -march option and
> > instead use a custom OpenSBI specific define inform availability of
> > V-extension to lib/sbi/sbi_trap_v_ldst.c.
> >
> > Fixes: c2acc5e5b0d8 ("lib: sbi_misaligned_ldst: Add handling of vector load/store")
> > Signed-off-by: Anup Patel <apatel at ventanamicro.com>
> > ---
> > Makefile                  | 8 ++++----
> > lib/sbi/sbi_trap_v_ldst.c | 5 +++--
> > 2 files changed, 7 insertions(+), 6 deletions(-)
> >
> > diff --git a/Makefile b/Makefile
> > index 5ac95a0f..7e0a1399 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -190,7 +190,7 @@ CC_SUPPORT_STRICT_ALIGN := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib
> > CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep -e "zicsr" -e "zifencei" > /dev/null && echo n || echo y)
> >
> > # Check whether the assembler and the compiler support the Vector extension
> > -CC_SUPPORT_VECT := $(shell echo | $(CC) -dM -E -march=rv$(OPENSBI_CC_XLEN)gv - | grep -q riscv.*vector && echo y || echo n)
> > +CC_SUPPORT_VECT := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)gv -dM -E -x c /dev/null 2>&1 | grep -q riscv.*vector && echo y || echo n)
> >
> > ifneq ($(OPENSBI_LD_PIE),y)
> > $(error Your linker does not support creating PIEs, opensbi requires this.)
> > @@ -298,9 +298,6 @@ endif
> > ifndef PLATFORM_RISCV_ISA
> >   ifneq ($(PLATFORM_RISCV_TOOLCHAIN_DEFAULT), 1)
> >     PLATFORM_RISCV_ISA := rv$(PLATFORM_RISCV_XLEN)imafdc
> > -    ifeq ($(CC_SUPPORT_VECT), y)
> > -      PLATFORM_RISCV_ISA := $(PLATFORM_RISCV_ISA)v
> > -    endif
> >     ifeq ($(CC_SUPPORT_ZICSR_ZIFENCEI), y)
> >       PLATFORM_RISCV_ISA := $(PLATFORM_RISCV_ISA)_zicsr_zifencei
> >     endif
> > @@ -363,6 +360,9 @@ GENFLAGS += $(firmware-genflags-y)
> > CFLAGS = -g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing -ffunction-sections -fdata-sections
> > CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls
> > # Optionally supported flags
> > +ifeq ($(CC_SUPPORT_VECT),y)
> > +CFLAGS += -DOPENSBI_CC_SUPPORT_VECT -fno-tree-vectorize
>
> The latter isn’t needed now you don’t enable V. Clang ignores it, even,
> it’s a flag that’s tied to GCC’s internals.
>

It's a left-over from an alternate patch which I was working on.
I will drop this option in the next revision.

Regards,
Anup



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