[PATCH 1/3] include: adding support for Zicfilp / Zicfiss encodings

[Samuel Holland]

Hi Deepak,

On 2024-08-21 6:55 PM, Deepak Gupta wrote:
> Zicfilp / Zicfiss extension (see link) introduces b2 (LPE) in menvcfg CSR to
> enable landing pads and b3 (SSE) in menvcfg CSR to enable shadow stack and
> landing pad for privilege less than M. Additionally extension introduces new
> bits in *status for recording landing pad state and a new exception type
> `software check exception` with cause=0x12.
> 
> Link: https://github.com/riscv/riscv-cfi
> 
> Signed-off-by: Deepak Gupta <debug at rivosinc.com>
> ---
>  include/sbi/riscv_encoding.h | 6 ++++++
>  include/sbi/sbi_hart.h       | 3 +++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
> index 2ed05f2..64cd9ab 100644
> --- a/include/sbi/riscv_encoding.h
> +++ b/include/sbi/riscv_encoding.h
> @@ -32,6 +32,8 @@
>  #define MSTATUS_TVM			_UL(0x00100000)
>  #define MSTATUS_TW			_UL(0x00200000)
>  #define MSTATUS_TSR			_UL(0x00400000)
> +#define MSTATUS_SPELP		_UL(0x00800000)
> +#define MSTATUS_MPELP		_UL(0x020000000000)

This won't compile on riscv32 because the value is out of range. The definition
needs to follow the pattern of those in the block below.

>  #define MSTATUS32_SD			_UL(0x80000000)
>  #if __riscv_xlen == 64
>  #define MSTATUS_UXL			_ULL(0x0000000300000000)
> @@ -213,6 +215,8 @@
>  #define ENVCFG_PBMTE			(_ULL(1) << 62)
>  #define ENVCFG_ADUE			(_ULL(1) << 61)
>  #define ENVCFG_CDE			(_ULL(1) << 60)
> +#define ENVCFG_SSE			(_ULL(1) << 3)
> +#define ENVCFG_LPE			(_ULL(1) << 2)

Please keep these ordered (should go just above ENVCFG_FIOM).

>  #define ENVCFG_CBZE			(_UL(1) << 7)
>  #define ENVCFG_CBCFE			(_UL(1) << 6)
>  #define ENVCFG_CBIE_SHIFT		4
> @@ -228,6 +232,7 @@
>  #define CSR_USTATUS			0x000
>  #define CSR_UIE				0x004
>  #define CSR_UTVEC			0x005
> +#define CSR_SSP				0x011
>  
>  /* User Trap Handling (N-extension) */
>  #define CSR_USCRATCH			0x040
> @@ -763,6 +768,7 @@
>  #define CAUSE_FETCH_PAGE_FAULT		0xc
>  #define CAUSE_LOAD_PAGE_FAULT		0xd
>  #define CAUSE_STORE_PAGE_FAULT		0xf
> +#define CAUSE_SW_CHECK_EXCP			0x12
>  #define CAUSE_FETCH_GUEST_PAGE_FAULT	0x14
>  #define CAUSE_LOAD_GUEST_PAGE_FAULT	0x15
>  #define CAUSE_VIRTUAL_INST_FAULT	0x16
> diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
> index 81ec061..2aa6867 100644
> --- a/include/sbi/sbi_hart.h
> +++ b/include/sbi/sbi_hart.h
> @@ -67,6 +67,9 @@ enum sbi_hart_extensions {
>  	SBI_HART_EXT_SVADE,
>  	/** Hart has Svadu extension */
>  	SBI_HART_EXT_SVADU,
> +	/** HART has zicfiss & zicfilp extension */
> +	SBI_HART_EXT_ZICFILP,
> +	SBI_HART_EXT_ZICFISS,

This needs to be part of the next patch, or it will trip the
_Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext)) in sbi_hart.c.

Regards,
Samuel

>  
>  	/** Maximum index of Hart extension */
>  	SBI_HART_EXT_MAX,