[PATCH] docs: platform: update platform_requirements.md
jay1273062855 at outlook.com
jay1273062855 at outlook.com
Thu Sep 28 01:25:23 PDT 2023
From: Yangjie Zhang <jay1273062855 at outlook.com>
"Zicsr" isa extension has been separated from "I" extension.
This patch add the isa requirement of "Zicsr" extension in
platform requirements documentation.
Signed-off-by: Yangjie Zhang <jay1273062855 at outlook.com>
---
docs/platform_requirements.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/platform_requirements.md b/docs/platform_requirements.md
index 8735adb..a843feb 100644
--- a/docs/platform_requirements.md
+++ b/docs/platform_requirements.md
@@ -18,7 +18,7 @@ Base Platform Requirements
The base RISC-V platform requirements for OpenSBI are as follows:
-1. At least rv32ima or rv64ima required on all HARTs
+1. At least rv32ima_zicsr or rv64ima_zicsr required on all HARTs
2. At least one HART should have S-mode support because:
* SBI calls are meant for RISC-V S-mode (Supervisor mode)
@@ -33,7 +33,7 @@ The base RISC-V platform requirements for OpenSBI are as follows:
6. Hardware support for injecting M-mode software interrupts on
a multi-HART platform
-The RISC-V extensions not covered by rv32ima or rv64ima are optional
+The RISC-V extensions not covered by rv32ima_zicsr or rv64ima_zicsr are optional
for OpenSBI. Although, OpenSBI will detect and handle some of these
optional RISC-V extensions at runtime.
--
2.34.1
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