[PATCH 2/4] lib: sbi: Add support for Svadu extension

[Yong-Xuan Wang]

This patch enables Svadu extension in the menvcfg CSR for lower privilege
modes. The menvcfg.HADE bit is read-only zero when the Svadu extension is
not implemented. So we try to enable menvcfg.HADE bit irrespective whether
the extension is available or not.

Signed-off-by: Yong-Xuan Wang <yongxuan.wang at sifive.com>
---
 include/sbi/riscv_encoding.h | 1 +
 lib/sbi/sbi_hart.c           | 6 ++++++
 2 files changed, 7 insertions(+)

diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 01bafcd..0952cba 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -209,6 +209,7 @@
 
 #define ENVCFG_STCE			(_ULL(1) << 63)
 #define ENVCFG_PBMTE			(_ULL(1) << 62)
+#define ENVCFG_HADE			(_ULL(1) << 61)
 #define ENVCFG_CBZE			(_UL(1) << 7)
 #define ENVCFG_CBCFE			(_UL(1) << 6)
 #define ENVCFG_CBIE_SHIFT		4
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index d749aea..21af2b5 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -153,6 +153,12 @@ static void mstatus_init(struct sbi_scratch *scratch)
 			menvcfg_val |= ENVCFG_STCE;
 		}
 
+		/* Set menvcfg.HADE == 1
+		 * If Svadu extension is not available then writes to
+		 * menvcfg.HADE will be ignored because it is a WARL field.
+		 */
+		menvcfg_val |= ENVCFG_HADE;
+
 		csr_write(CSR_MENVCFG, menvcfg_val);
 #if __riscv_xlen == 32
 		csr_write(CSR_MENVCFGH, menvcfg_val >> 32);
-- 
2.17.1