[PATCH 0/2] Not to clear all the bits of mip

[Anup Patel]

On Tue, Jan 17, 2023 at 1:44 PM Nick Hu <nick.hu at sifive.com> wrote:
>
> In generic behavior of QEMU, if we clear the mip.SEIP and the pendings of
> PLIC still exist, the QEMU may not set the mip.SEIP back immediately. So
> interrupts won't be handled anymore until the next new device interrupt
> arrived. We should only clear the SSIP and STIP which set by SW. The rest
> of the bits should be decided by HW.
>
> Nick Hu (2):
>   firmware: Not to clear all the MIP
>   lib: sbi_hsm: Use csr_set to restore the MIP

Applied this patch to the riscv/opensbi repo.

Thanks,
Anup

>
>  firmware/fw_base.S | 10 ++++++++--
>  lib/sbi/sbi_hsm.c  |  2 +-
>  2 files changed, 9 insertions(+), 3 deletions(-)
>
> --
> 2.34.1
>
>
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