[PATCH v2 4/7] lib: utils/irqchip: Add compatible string for Andestech NCEPLIC100

[Bin Meng]

On Sat, Nov 12, 2022 at 2:22 AM Prabhakar <prabhakar.csengg at gmail.com> wrote:
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
>
> Add compatible string for Andestech NCEPLIC100 found on Renesas RZ/Five SoC
> which is equipped with AX45MP AndesCore.
>
> While at it drop the comma after the sentinel as it does not make sense to
> have a comma after a sentinel, as any new elements must be added before the
> sentinel.
>
> dts example (Single-core AX45MP):
>
>     soc: soc {
>           ....
>           plic: interrupt-controller at 12c00000 {
>               compatible = "renesas,r9a07g043-plic", "andestech,nceplic100";
>               #interrupt-cells = <2>;
>               #address-cells = <0>;
>               riscv,ndev = <511>;
>               interrupt-controller;
>               reg = <0x0 0x12c00000 0 0x400000>;
>               clocks = <&cpg CPG_MOD R9A07G043_NCEPLIC_ACLK>;
>               power-domains = <&cpg>;
>               resets = <&cpg R9A07G043_NCEPLIC_ARESETN>;
>               interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>;
>           };
>           ....
>     };
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
> ---
> RFC->v2
> * No change
>
> DT binding [0]
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml?h=next-20221111#n56
> ---
>  lib/utils/irqchip/fdt_irqchip_plic.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng <bmeng at tinylab.org>