[PATCH 1/3] include: sbi: Add mtinst/htinst psuedoinstructions
dramforever
dramforever at live.com
Thu Jun 9 00:07:29 PDT 2022
Add psuedoinstruction encodings written to mtinst/htinst for faults
caused by implicit memory access for VS-stage address translation
Signed-off-by: dramforever <dramforever at live.com>
---
include/sbi/riscv_encoding.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index a164768..2292858 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -841,6 +841,26 @@
#define INSN_MASK_FENCE_TSO 0xffffffff
#define INSN_MATCH_FENCE_TSO 0x8330000f
+#if __riscv_xlen == 64
+
+/* 64-bit read for VS-stage address translation (RV64) */
+#define INSN_PSEUDO_VS_LOAD 0x00003000
+
+/* 64-bit write for VS-stage address translation (RV64) */
+#define INSN_PSEUDO_VS_STORE 0x00003020
+
+#elif __riscv_xlen == 32
+
+/* 32-bit read for VS-stage address translation (RV32) */
+#define INSN_PSEUDO_VS_LOAD 0x00002000
+
+/* 32-bit write for VS-stage address translation (RV32) */
+#define INSN_PSEUDO_VS_STORE 0x00002020
+
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+
#define INSN_16BIT_MASK 0x3
#define INSN_32BIT_MASK 0x1c
--
2.36.0
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