[RFC PATCH v2 7/9] lib: utils/irqchip: Add FDT wrappers for PLIC save/restore functions

[Anup Patel]

On Mon, May 30, 2022 at 9:07 AM Samuel Holland <samuel at sholland.org> wrote:
>
> These functions save/restore the state of the PLIC associated with the
> current hart. Only the S-mode context is saved/restored, under the
> assumption that none of the interrupts are enabled in M-mode anyway.

Instead of saving/restoring only S-mode context, I suggest we can either:
1) Save both M-mode and S-mode context
2) Add "bool mmode" parameter to decide which context to save/restore

I am inclined towards option#2 above.

>
> Signed-off-by: Samuel Holland <samuel at sholland.org>
> ---
>
> Changes in v2:
>  - New patch for v2
>
>  include/sbi_utils/irqchip/fdt_irqchip_plic.h | 20 ++++++++++++
>  lib/utils/irqchip/fdt_irqchip_plic.c         | 32 ++++++++++++++++++++
>  2 files changed, 52 insertions(+)
>  create mode 100644 include/sbi_utils/irqchip/fdt_irqchip_plic.h
>
> diff --git a/include/sbi_utils/irqchip/fdt_irqchip_plic.h b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
> new file mode 100644
> index 0000000..66650a2
> --- /dev/null
> +++ b/include/sbi_utils/irqchip/fdt_irqchip_plic.h
> @@ -0,0 +1,20 @@
> +/*
> + * SPDX-License-Identifier: BSD-2-Clause
> + *
> + * Copyright (c) 2022 Samuel Holland <samuel at sholland.org>
> + */
> +
> +#ifndef __IRQCHIP_FDT_IRQCHIP_PLIC_H__
> +#define __IRQCHIP_FDT_IRQCHIP_PLIC_H__
> +
> +#include <sbi/sbi_types.h>
> +
> +void irqchip_plic_priority_save(u8 *priority);
> +
> +void irqchip_plic_priority_restore(const u8 *priority);
> +
> +void irqchip_plic_context_save(u32 *enable, u32 *threshold);
> +
> +void irqchip_plic_context_restore(const u32 *enable, u32 threshold);
> +
> +#endif
> diff --git a/lib/utils/irqchip/fdt_irqchip_plic.c b/lib/utils/irqchip/fdt_irqchip_plic.c
> index b2d2a1b..37090d3 100644
> --- a/lib/utils/irqchip/fdt_irqchip_plic.c
> +++ b/lib/utils/irqchip/fdt_irqchip_plic.c
> @@ -24,6 +24,38 @@ static struct plic_data plic[PLIC_MAX_NR];
>  static struct plic_data *plic_hartid2data[SBI_HARTMASK_MAX_BITS];
>  static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
>
> +void irqchip_plic_priority_save(u8 *priority)
> +{
> +       struct plic_data *plic = plic_hartid2data[current_hartid()];
> +
> +       plic_priority_save(plic, priority);
> +}
> +
> +void irqchip_plic_priority_restore(const u8 *priority)
> +{
> +       struct plic_data *plic = plic_hartid2data[current_hartid()];
> +
> +       plic_priority_restore(plic, priority);
> +}
> +
> +void irqchip_plic_context_save(u32 *enable, u32 *threshold)
> +{
> +       u32 hartid = current_hartid();
> +
> +       plic_context_save(plic_hartid2data[hartid],
> +                         plic_hartid2context[hartid][1],

Don't assume that plic_hartid2context[hartid][1] != NULL because some
of the platforms such as SiFive FU540 and FU740 have core0 as a
embedded microcontroller with only M-mode.

Better to do nothing if plic_hartid2context[hartid][1] == NULL

> +                         enable, threshold);
> +}
> +
> +void irqchip_plic_context_restore(const u32 *enable, u32 threshold)
> +{
> +       u32 hartid = current_hartid();
> +
> +       plic_context_restore(plic_hartid2data[hartid],
> +                            plic_hartid2context[hartid][1],

Same comment as above.

> +                            enable, threshold);
> +}
> +
>  static int irqchip_plic_warm_init(void)
>  {
>         u32 hartid = current_hartid();
> --
> 2.35.1
>
>
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Regards,
Anup