[PATCH] lib: sbi: Fix PMP entry detetcion mechanism
Anup Patel
Anup.Patel at wdc.com
Tue Oct 27 04:03:53 EDT 2020
> -----Original Message-----
> From: opensbi <opensbi-bounces at lists.infradead.org> On Behalf Of Vincent
> Chen
> Sent: 27 October 2020 13:24
> To: opensbi at lists.infradead.org
> Cc: vincent.chen at sifive.com
> Subject: [PATCH] lib: sbi: Fix PMP entry detetcion mechanism
>
> The granularity of PMP access control settings is platform-specific. If the
> granularity is greater than 4 bytes, the current mechanism will not work
> because the return value will be forced to be granularity alignment so that
> the returned value is not equal to the written value. This patch writes
> PMP_ADDR_MASK to each PMP addr registers and checks the return value
> that is unequaled to zero to identify whether this PMP entry is support or
> not.
This was initially fixed by Pragnesh for SiFive Unleashed platform and finally
it has been fixed correctly by Atish.
Can you try latest OpenSBI repo ?
Regards,
Anup
>
> Signed-off-by: Vincent Chen <vincent.chen at sifive.com>
> ---
> lib/sbi/sbi_hart.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 6413194..42c4f51
> 100644
> --- a/lib/sbi/sbi_hart.c
> +++ b/lib/sbi/sbi_hart.c
> @@ -372,7 +372,7 @@ static void hart_detect_features(struct sbi_scratch
> *scratch)
> } else { \
> csr_write_allowed(__csr, (ulong)&trap, __wrval);\
> if (!trap.cause) { \
> - if (csr_swap(__csr, val) == __wrval) \
> + if (csr_swap(__csr, val)) \
> (hfeatures->__field)++;
> \
> else \
> goto __skip; \
> @@ -403,7 +403,7 @@ static void hart_detect_features(struct sbi_scratch
> *scratch)
> __check_csr_32(__csr + 32, __rdonly, __wrval, __field, __skip)
>
> /* Detect number of PMP regions */
> - __check_csr_64(CSR_PMPADDR0, 0, 1UL, pmp_count, __pmp_skip);
> + __check_csr_64(CSR_PMPADDR0, 0, PMP_ADDR_MASK,
> pmp_count, __pmp_skip);
> __pmp_skip:
>
> /* Detect number of MHPM counters */
> --
> 2.7.4
>
>
> --
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