[PATCH 2/2] treewide: Use conventional names for 32-bit and 64-bit

Anup Patel Anup.Patel at wdc.com
Wed Jul 24 20:47:54 PDT 2019



> -----Original Message-----
> From: opensbi <opensbi-bounces at lists.infradead.org> On Behalf Of Bin
> Meng
> Sent: Wednesday, July 24, 2019 10:00 AM
> To: opensbi <opensbi at lists.infradead.org>
> Subject: [PATCH 2/2] treewide: Use conventional names for 32-bit and 64-bit
> 
> There are several places in the source tree that have:
> 
>   32bit, 32 bit, 64bit, 64 bit
> 
> Fix by using the conventional names with a hyphen.
> 
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> ---
> 
>  README.md                         |  2 +-
>  docs/platform/qemu_sifive_u.md    |  4 ++--
>  docs/platform/qemu_virt.md        |  8 ++++----
>  include/sbi/sbi_platform.h        |  2 +-
>  platform/kendryte/k210/platform.h | 10 +++++-----  scripts/create-binary-
> archive.sh  |  4 ++--
>  6 files changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/README.md b/README.md
> index 5b505ad..e660a40 100644
> --- a/README.md
> +++ b/README.md
> @@ -47,7 +47,7 @@ cross-compilation, you can build your own toolchain or
> just download  a prebuilt one from the  [Bootlin toolchain repository]
> (https://toolchains.bootlin.com/).
> 
> -Please note that only a 64bit version of the toolchain is available in
> +Please note that only a 64-bit version of the toolchain is available in
>  the Bootlin toolchain repository for now.
> 
>  Building and Installing the OpenSBI Platform-Independent Library diff --git
> a/docs/platform/qemu_sifive_u.md b/docs/platform/qemu_sifive_u.md
> index 360f58d..48b30e4 100644
> --- a/docs/platform/qemu_sifive_u.md
> +++ b/docs/platform/qemu_sifive_u.md
> @@ -13,8 +13,8 @@ Platform Options
>  The *QEMU SiFive Unleashed Machine* platform does not have any
> platform specific  options.
> 
> -Executing on QEMU RISC-V 64bit
> -------------------------------
> +Executing on QEMU RISC-V 64-bit
> +-------------------------------
> 
>  **No Payload Case**
> 
> diff --git a/docs/platform/qemu_virt.md b/docs/platform/qemu_virt.md
> index 27efeab..12204e4 100644
> --- a/docs/platform/qemu_virt.md
> +++ b/docs/platform/qemu_virt.md
> @@ -15,8 +15,8 @@ Platform Options
>  The *QEMU RISC-V Virt Machine* platform does not have any platform-
> specific  options.
> 
> -Execution on QEMU RISC-V 64bit
> -------------------------------
> +Execution on QEMU RISC-V 64-bit
> +-------------------------------
> 
>  **No Payload Case**
> 
> @@ -82,8 +82,8 @@ qemu-system-riscv64 -M virt -m 256M -nographic \  ```
> 
> 
> -Execution on QEMU RISC-V 32bit
> -------------------------------
> +Execution on QEMU RISC-V 32-bit
> +-------------------------------
> 
>  **No Payload Case**
> 
> diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h index
> e3377b4..34cd732 100644
> --- a/include/sbi/sbi_platform.h
> +++ b/include/sbi/sbi_platform.h
> @@ -417,7 +417,7 @@ static inline int sbi_platform_ipi_init(const struct
> sbi_platform *plat,
>   *
>   * @param plat pointer to struct sbi_platform
>   *
> - * @return 64bit timer value
> + * @return 64-bit timer value
>   */
>  static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)  {
> diff --git a/platform/kendryte/k210/platform.h
> b/platform/kendryte/k210/platform.h
> index 8694ea8..492848b 100644
> --- a/platform/kendryte/k210/platform.h
> +++ b/platform/kendryte/k210/platform.h
> @@ -37,7 +37,7 @@
>  /* Under TileLink */
>  #define GPIOHS_BASE_ADDR	(0x38001000U)
> 
> -/* Under AXI 64 bit */
> +/* Under AXI 64-bit */
>  #define RAM_BASE_ADDR		(0x80000000U)
>  #define RAM_SIZE		(6 * 1024 * 1024U)
> 
> @@ -59,10 +59,10 @@
>  #define ROM_BASE_ADDR		(0x88000000U)
>  #define ROM_SIZE		(128 * 1024U)
> 
> -/* Under AHB 32 bit */
> +/* Under AHB 32-bit */
>  #define DMAC_BASE_ADDR		(0x50000000U)
> 
> -/* Under APB1 32 bit */
> +/* Under APB1 32-bit */
>  #define GPIO_BASE_ADDR		(0x50200000U)
>  #define UART1_BASE_ADDR		(0x50210000U)
>  #define UART2_BASE_ADDR		(0x50220000U)
> @@ -80,7 +80,7 @@
>  #define TIMER1_BASE_ADDR	(0x502E0000U)
>  #define TIMER2_BASE_ADDR	(0x502F0000U)
> 
> -/* Under APB2 32 bit */
> +/* Under APB2 32-bit */
>  #define WDT0_BASE_ADDR		(0x50400000U)
>  #define WDT1_BASE_ADDR		(0x50410000U)
>  #define OTP_BASE_ADDR		(0x50420000U)
> @@ -89,7 +89,7 @@
>  #define AES_BASE_ADDR		(0x50450000U)
>  #define RTC_BASE_ADDR		(0x50460000U)
> 
> -/* Under APB3 32 bit */
> +/* Under APB3 32-bit */
>  #define SPI0_BASE_ADDR		(0x52000000U)
>  #define SPI1_BASE_ADDR		(0x53000000U)
>  #define SPI3_BASE_ADDR		(0x54000000U)
> diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh
> index cc6d5a4..0a32709 100755
> --- a/scripts/create-binary-archive.sh
> +++ b/scripts/create-binary-archive.sh
> @@ -83,12 +83,12 @@ BUILD_ARCHIVE_NAME="opensbi-
> ${BUILD_VERSION_MAJOR}.${BUILD_VERSION_MINOR}-rv${BU
>  # Setup platform list
>  case "${BUILD_RISCV_XLEN}" in
>  32)
> -	# Setup 32bit platform list
> +	# Setup 32-bit platform list
>  	BUILD_PLATFORM_SUBDIR=("qemu/virt")
>  	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
>  	;;
>  64)
> -	# Setup 64bit platform list
> +	# Setup 64-bit platform list
>  	BUILD_PLATFORM_SUBDIR=("qemu/virt")
>  	BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
>  	BUILD_PLATFORM_SUBDIR+=("sifive/fu540")
> --
> 2.7.4
> 
> 
> _______________________________________________
> opensbi mailing list
> opensbi at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/opensbi

Thanks for cleaning this.

Acked-by: Anup Patel <anup.patel at wdc.com>

Applied this patch on riscv/opensbi repo.

Thanks,
Anup



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