[PATCH v2 3/3] rust: Enable for MIPS

Jiaxun Yang jiaxun.yang at flygoat.com
Sun Sep 8 19:01:45 PDT 2024



在2024年9月8日九月 下午9:43,Maciej W. Rozycki写道:
> On Thu, 5 Sep 2024, Jiaxun Yang wrote:
>
>> diff --git a/scripts/generate_rust_target.rs b/scripts/generate_rust_target.rs
>> index 863720777313..bbdf8a4dd169 100644
>> --- a/scripts/generate_rust_target.rs
>> +++ b/scripts/generate_rust_target.rs
> [...]
>> +        } else {
>> +            ts.push("arch", "mips");
>> +            cfg.get("TARGET_ISA_REV").map(|isa_rev| {
>> +                let feature = match isa_rev.as_str() {
>> +                    "1" => ",+mips32",
>> +                    "2" => ",+mips32r2",
>> +                    "5" => ",+mips32r5",
>> +                    "6" => ",+mips32r6",
>> +                    _ => ",+mips2",
>
>  What's the consequence of using `mips2' rather than `mips1' here?  How 
> about other ISA revisions, e.g. `mips4' (that also applies to the 64BIT 
> leg)?

LLVM's mips1 backend is a little bit broken beyond repair, so I tried to use mips2
as a baseline. I should probably let HAVE_RUST depend on !CPU_R3000 to get it covered.

We have no good way to tell ISA reversion prior to R1 just from Kconfig TARGET_ISA_REV,
valid numbers for TARGET_ISA_REV are only 1, 2, 5, 6 from Kconfig.

Given that mips 2 and 3 binaries (Rust object files) can link run flawlessly on all pre-R6
(despite R3000) hardware with matching bitness, they were chosen as fallback here.

Thanks
>
>   Maciej

-- 
- Jiaxun



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