[PATCH v4 1/2] Introduce cpu_icache_is_aliasing() across all architectures

[Vlastimil Babka]

On 12/7/24 18:16, Zi Yan wrote:
> In commit eacd0e950dc2 ("ARC: [mm] Lazy D-cache flush (non aliasing
> VIPT)"), arc adds the need to flush dcache to make icache see the code
> page change. This also requires special handling for
> clear_user_(high)page(). Introduce cpu_icache_is_aliasing() to make
> MM code query special clear_user_(high)page() easier. This will be used
> by the following commit.
> 
> Suggested-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>
> Signed-off-by: Zi Yan <ziy at nvidia.com>
> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>

Acked-by: Vlastimil Babka <vbabka at suse.cz>

Note this is mm-hotfixes material due to patch 2 fixing an rc1 bug. It's
better to say that in the subject i.e. [PATCH mm-hotfixes v4 ...] next time.