[PATCH 21/27] arcv3: TCG instruction generator changes

[Richard Henderson]

On 4/5/21 7:31 AM, cupertinomiranda at gmail.com wrote:
> +        if(ctx->insn.limm & 0x80000000)
> +          ctx->insn.limm += 0xffffffff00000000;

(1) bad braces, but
(2) use an unconditional cast to int32_t.

Qemu forces the compiler to use standard 2's compliment arithmetic. We don't 
have to go out of our way to work around the ISO-C lunacy of "undefined values" 
that for no good reason still allows sign-magnitude and 1's compliment arithmetic.

> +    if (ctx->insn.cc) {
> +        TCGv cc = tcg_temp_local_new();
> +        arc_gen_verifyCCFlag(ctx, cc);
> +        tcg_gen_brcondi_tl(TCG_COND_NE, cc, 1, done);
> +        tcg_temp_free(cc);
> +    }
> +

Lots of non-uses of gen_cc_prologue/epilogue.


r~