[PATCH v6 0/6] irqchip: dw-apb-ictl: support hierarchy irq domain

[Marc Zyngier]

On Thu, 24 Sep 2020 15:17:48 +0800, Zhen Lei wrote:
> v5 --> v6:
> 1. add Reviewed-by: Rob Herring <robh at kernel.org> for Patch 4.
> 2. Some modifications are made to Patch 5:
>    1) add " |" for each "description:" property if its content exceeds one line,
>       to tell the yaml keep the "newline" character.
>    2) add "..." to mark the end of the yaml file.
>    3) Change the name list of maintainers to the author of "snps,dw-apb-ictl.txt"
> 	 maintainers:
> 	-  - Marc Zyngier <marc.zyngier at arm.com>
> 	+  - Sebastian Hesselbarth <sebastian.hesselbarth at gmail.com>
>    4) add "maxItems: 1" for property "reg".
>    5) for property "interrupts":
> 	 interrupts:
> 	-    minItems: 1
> 	-    maxItems: 65
> 	+    maxItems: 1
>    6) move below descriptions under the top level property "description:"
> 	description: |
> 	  Synopsys DesignWare provides interrupt controller IP for APB known as
> 	  dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs
> 	  with APB bus, e.g. Marvell Armada 1500. It can also be used as primary
> 	  interrupt controller in some SoCs, e.g. Hisilicon SD5203.
> 
> [...]

Applied to irq/irqchip-next, thanks!

[1/6] genirq: Add stub for set_handle_irq() when !GENERIC_IRQ_MULTI_HANDLER
      commit: ea0c80d1764449acf2f70fdb25aec33800cd0348
[2/6] irqchip/dw-apb-ictl: Refactor priot to introducing hierarchical irq domains
      commit: d59f7d159891466361808522b63cf3548ea3ecb0
[3/6] irqchip/dw-apb-ictl: Add primary interrupt controller support
      commit: 54a38440b84f8933b555c23273deca6a396f6708
[4/6] dt-bindings: dw-apb-ictl: Update binding to describe use as primary interrupt controller
      commit: 8156b80fd4885d0ca9748e736441cc37f4eb476a

I have dropped patch 5 as it doesn't have Rob's Ack yet (and is not that
critical) as well as patch 6 which is better routed via the ARC tree.

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.