[PATCH v3] clk/axs10x: Add I2S PLL clock driver

[Stephen Boyd]

On 04/04, Jose Abreu wrote:
> >> +	fbdiv = i2s_pll_get_value(readl((void *)PLL_FBDIV_ADDR));
> >> +	odiv = i2s_pll_get_value(readl((void *)PLL_ODIV0_ADDR));
> >> +
> >> +	return (((clk->ref_clk / idiv ) * fbdiv) / odiv);
> > Again, too many parentheses. Also, any concerns of 32-bit
> > truncation here (i.e. is 64-bit math needed)?
> 
> You are right there is no need to use 64-bit math, will change in next version.

Well it wasn't 64-bit math in the first place, so the question
was more if you wanted to use 64-bit math.

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