[PATCH] ARM: dts: bcm283x: Fix fifo size for EP 6,7
Minas Harutyunyan
Minas.Harutyunyan at synopsys.com
Thu Nov 23 02:00:37 PST 2017
Hi Stefan,
On 11/22/2017 6:15 PM, Stefan Wahren wrote:
> Hi Minas,
>
>> Stefan Wahren <stefan.wahren at i2se.com> hat am 22. November 2017 um 12:21 geschrieben:
>>
>>
>> Hi Minas,
>>
>>> Minas Harutyunyan <Minas.Harutyunyan at synopsys.com> hat am 21. November 2017 um 13:02 geschrieben:
>>>
>>> Hi Stefan,
>>>
>>> We have prepared patch for this issue in July-August'17.
>>> Find attached 2 patch files. Please apply patches and test. If issue
>>> gone, we will send these patches to LKML by regular flow.
>>
>> thanks, but the first patch doesn't apply. My version see below, i hope i didn't break anything.
>>
>> Unfortunately after applying both patches the issue still persists (EP 1-7 fifo size to 512) and the EP 1-7 TX total size increases from 3776 to 3792. I will follow my u-boot theory ...
>
> okay there is no influence of u-boot. If i boot directly from the RPi Bootloader it shows the same behavior.
>
> I did the following test cases with enabled debug:
> 1. boot RPI Zero (OTG configured per DT) without anything connected to the OTG port
> 2. boot RPI Zero (OTG configured per DT) only a OTG cable connected to the OTG port
>
> test case 1 (nothing connected, no issue):
> dwc2 20980000.usb: mapped PA 20980000 to VA dc850000
> dwc2 20980000.usb: registering common handler for irq33
> dwc2 20980000.usb: Core Release: 2.80a (snpsid=4f54280a)
> dwc2 20980000.usb: Forcing mode to host
> dwc2 20980000.usb: NonPeriodic TXFIFO size: 32
> dwc2 20980000.usb: RXFIFO size: 256
> dwc2 20980000.usb: EPs: 8, dedicated fifos, 4080 entries in SPRAM
> dwc2 20980000.usb: DCFG=0x00200000, DCTL=0x00000000, DIEPMSK=00000000
> dwc2 20980000.usb: GAHBCFG=0x00000000, GHWCFG1=0x00000000
> dwc2 20980000.usb: GRXFSIZ=0x00001000, GNPTXFSIZ=0x00201000
> dwc2 20980000.usb: DPTx[1] FSize=512, StAddr=0x00001020
> dwc2 20980000.usb: DPTx[2] FSize=512, StAddr=0x00001220
> dwc2 20980000.usb: DPTx[3] FSize=512, StAddr=0x00001420
> dwc2 20980000.usb: DPTx[4] FSize=512, StAddr=0x00001620
> dwc2 20980000.usb: DPTx[5] FSize=512, StAddr=0x00001820
> dwc2 20980000.usb: DPTx[6] FSize=768, StAddr=0x00001a20
> dwc2 20980000.usb: DPTx[7] FSize=768, StAddr=0x00001d20
> ...
> dwc2 20980000.usb: Core Global Registers
> dwc2 20980000.usb: GOTGCTL @0xDC850000 : 0x000D0000
> dwc2 20980000.usb: GOTGINT @0xDC850004 : 0x00000000
> dwc2 20980000.usb: GAHBCFG @0xDC850008 : 0x00000030
> dwc2 20980000.usb: GUSBCFG @0xDC85000C : 0x00001700
> dwc2 20980000.usb: GRSTCTL @0xDC850010 : 0x80000000
> dwc2 20980000.usb: GINTSTS @0xDC850014 : 0x04008C22
> dwc2 20980000.usb: GINTMSK @0xDC850018 : 0xD0000806
> dwc2 20980000.usb: GRXSTSR @0xDC85001C : 0xFADEA4E0
> dwc2 20980000.usb: GRXFSIZ @0xDC850024 : 0x00001000
> dwc2 20980000.usb: GNPTXFSIZ @0xDC850028 : 0x00201000
> dwc2 20980000.usb: GNPTXSTS @0xDC85002C : 0x00080020
> dwc2 20980000.usb: GI2CCTL @0xDC850030 : 0x00000000
> dwc2 20980000.usb: GPVNDCTL @0xDC850034 : 0x00000000
> dwc2 20980000.usb: GGPIO @0xDC850038 : 0x00000000
> dwc2 20980000.usb: GUID @0xDC85003C : 0x2708A000
> dwc2 20980000.usb: GSNPSID @0xDC850040 : 0x4F54280A
> dwc2 20980000.usb: GHWCFG1 @0xDC850044 : 0x00000000
> dwc2 20980000.usb: GHWCFG2 @0xDC850048 : 0x228DDD50
> dwc2 20980000.usb: GHWCFG3 @0xDC85004C : 0x0FF000E8
> dwc2 20980000.usb: GHWCFG4 @0xDC850050 : 0x1FF00020
> dwc2 20980000.usb: GLPMCFG @0xDC850054 : 0x75736230
> dwc2 20980000.usb: GPWRDN @0xDC850058 : 0x00000000
> dwc2 20980000.usb: GDFIFOCFG @0xDC85005C : 0x00000000
> dwc2 20980000.usb: HPTXFSIZ @0xDC850100 : 0x00000000
> dwc2 20980000.usb: PCGCTL @0xDC850E00 : 0x00000000
> ...
> dwc2 20980000.usb: gintsts=04008c22 gintmsk=d0000806
> dwc2 20980000.usb: Mode Mismatch Interrupt: currently in Device mode
> dwc2 20980000.usb: USB SUSPEND
> dwc2 20980000.usb: DSTS=0x3
> dwc2 20980000.usb: DSTS.Suspend Status=1 HWCFG4.Power Optimize=0
> dwc2 20980000.usb: dwc2_hsotg_irq: 04008420 00000000 (d0000806) retry 8
>
> test case 2 (OTG cable connected, issue):
> dwc2 20980000.usb: mapped PA 20980000 to VA dc850000
> dwc2 20980000.usb: registering common handler for irq33
> dwc2 20980000.usb: Core Release: 2.80a (snpsid=4f54280a)
> dwc2 20980000.usb: Forcing mode to device
> dwc2 20980000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[6]=768
> dwc2 20980000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[7]=768
> dwc2 20980000.usb: NonPeriodic TXFIFO size: 32
> dwc2 20980000.usb: RXFIFO size: 256
> dwc2 20980000.usb: EPs: 8, dedicated fifos, 4080 entries in SPRAM
> dwc2 20980000.usb: DCFG=0x00000000, DCTL=0x00000000, DIEPMSK=00000000
> dwc2 20980000.usb: GAHBCFG=0x00000000, GHWCFG1=0x00000000
> dwc2 20980000.usb: GRXFSIZ=0x00001000, GNPTXFSIZ=0x01001000
> dwc2 20980000.usb: DPTx[1] FSize=512, StAddr=0x00002000
> dwc2 20980000.usb: DPTx[2] FSize=512, StAddr=0x00002000
> dwc2 20980000.usb: DPTx[3] FSize=512, StAddr=0x00002000
> dwc2 20980000.usb: DPTx[4] FSize=512, StAddr=0x00002000
> dwc2 20980000.usb: DPTx[5] FSize=512, StAddr=0x00002000
> dwc2 20980000.usb: DPTx[6] FSize=512, StAddr=0x00002000
> dwc2 20980000.usb: DPTx[7] FSize=512, StAddr=0x00002000
> ...
> dwc2 20980000.usb: Core Global Registers
> dwc2 20980000.usb: GOTGCTL @0xDC850000 : 0x001C0000
> dwc2 20980000.usb: GOTGINT @0xDC850004 : 0x00000000
> dwc2 20980000.usb: GAHBCFG @0xDC850008 : 0x00000030
> dwc2 20980000.usb: GUSBCFG @0xDC85000C : 0x00001700
> dwc2 20980000.usb: GRSTCTL @0xDC850010 : 0x80000000
> dwc2 20980000.usb: GINTSTS @0xDC850014 : 0x04000021
> dwc2 20980000.usb: GINTMSK @0xDC850018 : 0xF3000806
> dwc2 20980000.usb: GRXSTSR @0xDC85001C : 0x897ED705
> dwc2 20980000.usb: GRXFSIZ @0xDC850024 : 0x00000306
> dwc2 20980000.usb: GNPTXFSIZ @0xDC850028 : 0x01000306
> dwc2 20980000.usb: GNPTXSTS @0xDC85002C : 0x07080100
> dwc2 20980000.usb: GI2CCTL @0xDC850030 : 0x00000000
> dwc2 20980000.usb: GPVNDCTL @0xDC850034 : 0x00000000
> dwc2 20980000.usb: GGPIO @0xDC850038 : 0x00000000
> dwc2 20980000.usb: GUID @0xDC85003C : 0x2708A000
> dwc2 20980000.usb: GSNPSID @0xDC850040 : 0x4F54280A
> dwc2 20980000.usb: GHWCFG1 @0xDC850044 : 0x00000000
> dwc2 20980000.usb: GHWCFG2 @0xDC850048 : 0x228DDD50
> dwc2 20980000.usb: GHWCFG3 @0xDC85004C : 0x0FF000E8
> dwc2 20980000.usb: GHWCFG4 @0xDC850050 : 0x1FF00020
> dwc2 20980000.usb: GLPMCFG @0xDC850054 : 0x75736230
> dwc2 20980000.usb: GPWRDN @0xDC850058 : 0x00000000
> dwc2 20980000.usb: GDFIFOCFG @0xDC85005C : 0x00000000
> dwc2 20980000.usb: HPTXFSIZ @0xDC850100 : 0x02000406
> dwc2 20980000.usb: PCGCTL @0xDC850E00 : 0x00000000
> ...
> dwc2 20980000.usb: gintsts=04000025 gintmsk=f3000806
> dwc2 20980000.usb: ++OTG Interrupt gotgint=40000 [a_host]
> dwc2 20980000.usb: ++OTG Interrupt: A-Device Timeout Change++
>
> Please tell me if you need more information?
>
> Thanks
> Stefan
>
In addition to above patches please apply this one:
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 42ac47f85bb4..7db50c27c061 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -433,6 +433,14 @@ void dwc2_force_mode(struct dwc2_hsotg *hsotg, bool
host)
dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
dwc2_wait_for_mode(hsotg, host);
+
+ /* Reset after mode changed. Required to restore
+ * 'power on reset' values for chosen mode
+ */
+ if (dwc2_core_reset(hsotg, true))
+ dev_err(hsotg->dev,
+ "%s: Reset failed, aborting", __func__);
+
return;
}
Core reset required after mode forcing to get power on reset values for
chosen mode.
One question. This debug print:
EPs: 8, dedicated fifos, 4080 entries in SPRAM
Assume that you didn't apply second patch c6f7e1c.diff. Am I right? By
applying mentioned patch SPRAM entries should changed to 4096.
BTW, your update of first patch is correct. Sorry for sending wrong
patch, that patch assume that applied another series of patches which
not in mainline Kernel yet.
Thanks,
Minas
More information about the linux-rpi-kernel
mailing list