[PATCH v2] dmaengine: bcm2835: Add slave dma support
kernel at martin.sperl.org
Fri May 1 14:07:33 PDT 2015
Tests with the initial (and incomplete) version of the spi-bcm2835 driver
with DMA transfer support show that the dma-engine works as expected with
There is one one observation:
> On 18.04.2015, at 13:06, Noralf Trønnes <noralf at tronnes.org> wrote:
> +static struct dma_async_tx_descriptor *
> +bcm2835_dma_prep_slave_sg(struct dma_chan *chan,
> + struct scatterlist *sgl,
> + unsigned int sg_len,
> + enum dma_transfer_direction direction,
> + unsigned long flags, void *context)
> + /* Enable */
> + if (i == sg_len - 1 && len - j <= max_size)
> + control_block->info |= BCM2835_DMA_INT_EN;
The observation is that an interrupt is always triggered - even in the case
where flags does NOT have DMA_PREP_INTERRUPT set.
This may not be necessary and avoid interrupts.
So maybe the above if clause should get extended by:
&& (flags & DMA_PREP_INTERRUPT)
to only trigger an interrupt when really requested.
I am not sure if there are any side-effects because of this besides having the
requirement on the client to run dmaengine_terminate_all() on that specific dma
channel without interrupts when the transfer is finished.
In the case of SPI we have TX feed the fifo - which finishes early - , but we
only need to the interrupt when RX finishes reading the fifo, which indicates
that the SPI-transfer is fully finished.
So having an interrupt on TX is not necessary for the process.
The same observations may also apply to bcm2835_dma_prep_dma_cyclic (which is
outside of this patch provided by Noralf).
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