From swarren at wwwdotorg.org  Thu Sep  6 01:07:18 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Wed,  5 Sep 2012 23:07:18 -0600
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
Message-ID: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>

The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
series which contains the BCM2835 amongst other variants. This patch
adds very basic support for this series of SoCs, under the BCM2708 name.

http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd

Note that the documentation in the latter .pdf assumes the MMU setup that's
used on the "VideoCore" companion processor, and does not document physical
peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses.

The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
minimal device tree for this board; enough to see some very early kernel
boot messages through earlyprintk.

http://www.raspberrypi.org/.

This series was extracted from git://github.com/lp0/linux.git branch
rpi-next or rpi-linear from 3-4 months ago, and significantly stripped
down and modified since. The work in that branch was signed-off-by:

    Chris Boot <bootc at bootc.net>
    Simon Arlott <sa.me.uk> [sic]

Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
To do:
* Interrupt controller and timer aren't implemented, so the kernel only
  boots as far as "Calibrating delay loop...". However, this patch is
  intended solely to provide the very basic infra-structure so people
  can start filling in the gaps in mainline rather than downstream.
* No device drivers are implemented yet.

Questions:
* It is asserted (I believe by Broadcom) that the BCM2835 is the only SoC
  in the series likely to see Linux support. Irrespective, those working
  on BCM2835 support downstream (see git URL above) have chosen to name
  the kernel support after the primary SoC (BCM2708) rather than the
  particular instance in use on the Raspberry Pi (BCM2835). I've followed
  that here, although I wonder if it's really the correct thing to do?
* Should bcm2708_map_io() map the entire peripheral address range, or
  only the debug UART iff DEBUG_LL is enabled? Presumably anything other
  than the UART should be using of_iomap(), so doesn't need to be
  statically mapped; are the IRQ controller/timer set up before
  of_iomap() will work with non-static mappings?
* Does the (currently somewhat arbitrary) value for BCM2708_PERIPH_VIRT
  matter; should it be picked to align nicely with any particular part
  of the kernel's virtual address layout?
---
 arch/arm/Kconfig                                 |   19 ++++
 arch/arm/Makefile                                |    1 +
 arch/arm/boot/dts/bcm2835-rpi-b.dts              |   12 +++
 arch/arm/boot/dts/bcm2835.dtsi                   |   10 +++
 arch/arm/configs/bcm2708_defconfig               |  102 ++++++++++++++++++++++
 arch/arm/mach-bcm2708/Makefile                   |    1 +
 arch/arm/mach-bcm2708/Makefile.boot              |    5 ++
 arch/arm/mach-bcm2708/common.c                   |   80 +++++++++++++++++
 arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h |   29 ++++++
 arch/arm/mach-bcm2708/include/mach/debug-macro.S |   24 +++++
 arch/arm/mach-bcm2708/include/mach/hardware.h    |   18 ++++
 arch/arm/mach-bcm2708/include/mach/timex.h       |   26 ++++++
 arch/arm/mach-bcm2708/include/mach/uncompress.h  |   49 +++++++++++
 13 files changed, 376 insertions(+)
 create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2835.dtsi
 create mode 100644 arch/arm/configs/bcm2708_defconfig
 create mode 100644 arch/arm/mach-bcm2708/Makefile
 create mode 100644 arch/arm/mach-bcm2708/Makefile.boot
 create mode 100644 arch/arm/mach-bcm2708/common.c
 create mode 100644 arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-bcm2708/include/mach/hardware.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/timex.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/uncompress.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 88ff698..3c11dce 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -349,6 +349,25 @@ config ARCH_AT91
 	  This enables support for systems based on Atmel
 	  AT91RM9200 and AT91SAM9* processors.
 
+config ARCH_BCM2708
+	bool "Broadcom BCM2708 family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_ERRATA_411920
+	select ARM_TIMER_SP804
+	select CLKDEV_LOOKUP
+	select COMMON_CLK
+	select CPU_V6
+	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+	select USE_OF
+	select WATCHDOG
+	help
+	  This enables support for the Broadcom BCM2708 SoC series. The
+	  BCM2835 is one such SoC in this series. The Raspberry Pi uses
+	  the BCM2835.
+
 config ARCH_BCMRING
 	bool "Broadcom BCMRING"
 	depends on MMU
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 30eae87..853c761 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -136,6 +136,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)		:= at91
+machine-$(CONFIG_ARCH_BCM2708)		:= bcm2708
 machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)		:= cns3xxx
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
new file mode 100644
index 0000000..7e43197
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/memreserve/ 0x0c000000 0x04000000;
+/include/ "bcm2835.dtsi"
+
+/ {
+	model = "Raspberry Pi Model B";
+	compatible = "raspberrypi,model-b", "broadcom,bcm2835", "broadcom,bcm2708";
+
+	memory {
+		reg = <0 0x10000000>;
+	};
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
new file mode 100644
index 0000000..221a49a
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -0,0 +1,10 @@
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "broadcom,bcm2835", "broadcom,bcm2708";
+	model = "BCM2835";
+
+	chosen {
+		bootargs = "earlyprintk";			/* Set by VideoCore */
+	};
+};
diff --git a/arch/arm/configs/bcm2708_defconfig b/arch/arm/configs/bcm2708_defconfig
new file mode 100644
index 0000000..55cd103
--- /dev/null
+++ b/arch/arm/configs/bcm2708_defconfig
@@ -0,0 +1,102 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_BLOCK is not set
+CONFIG_ARCH_BCM2708=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_COMPACTION=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_CLEANCACHE=y
+CONFIG_SECCOMP=y
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=48
+CONFIG_SERIAL_8250_RUNTIME_UARTS=32
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_AMBA_PL010=y
+CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_PRINTK_TIME=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_BOOT_PRINTK_DELAY=y
+CONFIG_SCHED_TRACER=y
+CONFIG_STACK_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_KGDB=y
+CONFIG_KGDB_KDB=y
+CONFIG_TEST_KSTRTOX=y
+CONFIG_STRICT_DEVMEM=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile
new file mode 100644
index 0000000..f95691b
--- /dev/null
+++ b/arch/arm/mach-bcm2708/Makefile
@@ -0,0 +1 @@
+obj-y += common.o
diff --git a/arch/arm/mach-bcm2708/Makefile.boot b/arch/arm/mach-bcm2708/Makefile.boot
new file mode 100644
index 0000000..0831fd1
--- /dev/null
+++ b/arch/arm/mach-bcm2708/Makefile.boot
@@ -0,0 +1,5 @@
+   zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
+
+dtb-y += bcm2835-rpi-b.dtb
diff --git a/arch/arm/mach-bcm2708/common.c b/arch/arm/mach-bcm2708/common.c
new file mode 100644
index 0000000..85f19aa3
--- /dev/null
+++ b/arch/arm/mach-bcm2708/common.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/exception.h>
+
+#include <mach/bcm2708_soc.h>
+
+static struct map_desc io_map __initdata = {
+	.virtual = BCM2708_PERIPH_VIRT,
+	.pfn = __phys_to_pfn(BCM2708_PERIPH_BASE),
+	.length = BCM2708_PERIPH_SIZE,
+	.type = MT_DEVICE
+};
+
+void __init bcm2708_map_io(void)
+{
+	iotable_init(&io_map, 1);
+}
+
+void __init bcm2708_init_irq(void)
+{
+}
+
+asmlinkage void __exception_irq_entry bcm2708_handle_irq(struct pt_regs *regs)
+{
+}
+
+void __init bcm2708_init(void)
+{
+	int ret;
+
+	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
+				   NULL);
+	if (ret) {
+		pr_err("of_platform_populate failed: %d\n", ret);
+		BUG();
+	}
+}
+
+static void __init bcm2708_timer_init(void)
+{
+}
+
+struct sys_timer bcm2708_timer = {
+	.init = bcm2708_timer_init
+};
+
+static const char * const bcm2708_compat[] = {
+	"broadcom,bcm2708",
+	NULL
+};
+
+DT_MACHINE_START(BCM2708, "BCM2708")
+	.map_io = bcm2708_map_io,
+	.init_irq = bcm2708_init_irq,
+	.handle_irq = bcm2708_handle_irq,
+	.init_machine = bcm2708_init,
+	.timer = &bcm2708_timer,
+	.dt_compat = bcm2708_compat
+MACHINE_END
diff --git a/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h b/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
new file mode 100644
index 0000000..4ddeb4e
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_BCM2708_BCM2708_SOC_H__
+#define __MACH_BCM2708_BCM2708_SOC_H__
+
+#include <asm/sizes.h>
+
+#define BCM2708_PERIPH_BASE	0x20000000
+#define BCM2708_PERIPH_VIRT	0xf0000000
+#define BCM2708_PERIPH_SIZE	SZ_16M
+#define BCM2708_DEBUG_BASE	0x20201000
+#define BCM2708_DEBUG_VIRT	0xf0201000
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/debug-macro.S b/arch/arm/mach-bcm2708/include/mach/debug-macro.S
new file mode 100644
index 0000000..ef71e41
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/debug-macro.S
@@ -0,0 +1,24 @@
+/*
+ * Debugging macro include header
+ *
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ *  Copyright (C) 2010 Broadcom
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <mach/bcm2708_soc.h>
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rp, =BCM2708_DEBUG_BASE
+	ldr	\rv, =BCM2708_DEBUG_VIRT
+	.endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-bcm2708/include/mach/hardware.h b/arch/arm/mach-bcm2708/include/mach/hardware.h
new file mode 100644
index 0000000..2b15d0b
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_BCM2708_HARDWARE_H__
+#define __MACH_BCM2708_HARDWARE_H__
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/timex.h b/arch/arm/mach-bcm2708/include/mach/timex.h
new file mode 100644
index 0000000..ca67219
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/timex.h
@@ -0,0 +1,26 @@
+/*
+ *  BCM2708 system clock frequency
+ *
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+#define CLOCK_TICK_RATE		(1000000)
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/uncompress.h b/arch/arm/mach-bcm2708/include/mach/uncompress.h
new file mode 100644
index 0000000..0c8fe04
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/uncompress.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/amba/serial.h>
+#include <mach/bcm2708_soc.h>
+
+#define UART_BAUD 115200
+#define UART0_BASE BCM2708_DEBUG_BASE
+
+#define BCM2708_UART_DR IOMEM(UART0_BASE + UART01x_DR)
+#define BCM2708_UART_FR IOMEM(UART0_BASE + UART01x_FR)
+#define BCM2708_UART_CR IOMEM(UART0_BASE + UART011_CR)
+
+static inline void putc(int c)
+{
+	while (__raw_readl(BCM2708_UART_FR) & UART01x_FR_TXFF)
+		barrier();
+
+	__raw_writel(c, BCM2708_UART_DR);
+}
+
+static inline void flush(void)
+{
+	int fr;
+
+	do {
+		fr = __raw_readl(BCM2708_UART_FR);
+		barrier();
+	} while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE);
+}
+
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
-- 
1.7.9.5



From arnd at arndb.de  Thu Sep  6 05:04:14 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Thu, 6 Sep 2012 09:04:14 +0000
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209060904.14903.arnd@arndb.de>

On Thursday 06 September 2012, Stephen Warren wrote:
> The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
> series which contains the BCM2835 amongst other variants. This patch
> adds very basic support for this series of SoCs, under the BCM2708 name.

Very nice!

> ---
> To do:
> * Interrupt controller and timer aren't implemented, so the kernel only
>   boots as far as "Calibrating delay loop...". However, this patch is
>   intended solely to provide the very basic infra-structure so people
>   can start filling in the gaps in mainline rather than downstream.
> * No device drivers are implemented yet.

ok

> Questions:
> * It is asserted (I believe by Broadcom) that the BCM2835 is the only SoC
>   in the series likely to see Linux support. Irrespective, those working
>   on BCM2835 support downstream (see git URL above) have chosen to name
>   the kernel support after the primary SoC (BCM2708) rather than the
>   particular instance in use on the Raspberry Pi (BCM2835). I've followed
>   that here, although I wonder if it's really the correct thing to do?

Doesn't matter too much. Depending on how different the various broadcom
SoCs actually are, we might even name this mach-bcm and eventually try to
merge the existing bcmring into it.

> * Should bcm2708_map_io() map the entire peripheral address range, or
>   only the debug UART iff DEBUG_LL is enabled? Presumably anything other
>   than the UART should be using of_iomap(), so doesn't need to be
>   statically mapped; are the IRQ controller/timer set up before
>   of_iomap() will work with non-static mappings?

Mapping the entire range is fine, as long as it's not too large. This
will end up using large pages for the mapping, which is a bit more efficient,
and any call to of_iomap or ioremap will just return the same address
rather than adding another mapping.

> * Does the (currently somewhat arbitrary) value for BCM2708_PERIPH_VIRT
>   matter; should it be picked to align nicely with any particular part
>   of the kernel's virtual address layout?

The only requirement is that it's inside of the vmalloc area described in
Documentation/arm/memory.txt. 0xf0000000 is fine here.

> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 88ff698..3c11dce 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -349,6 +349,25 @@ config ARCH_AT91
>  	  This enables support for systems based on Atmel
>  	  AT91RM9200 and AT91SAM9* processors.
>  
> +config ARCH_BCM2708
> +	bool "Broadcom BCM2708 family"
> +	select ARCH_WANT_OPTIONAL_GPIOLIB
> +	select ARM_AMBA
> +	select ARM_ERRATA_411920
> +	select ARM_TIMER_SP804
> +	select CLKDEV_LOOKUP
> +	select COMMON_CLK
> +	select CPU_V6
> +	select GENERIC_CLOCKEVENTS
> +	select MULTI_IRQ_HANDLER
> +	select SPARSE_IRQ
> +	select USE_OF
> +	select WATCHDOG

All the good things are there, but normally one does not select WATCHDOG here.

> +CONFIG_SERIAL_8250=y
> +CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_8250_NR_UARTS=48
> +CONFIG_SERIAL_8250_RUNTIME_UARTS=32
> +CONFIG_SERIAL_8250_EXTENDED=y
> +CONFIG_SERIAL_8250_MANY_PORTS=y
> +CONFIG_SERIAL_8250_SHARE_IRQ=y
> +CONFIG_SERIAL_AMBA_PL010=y
> +CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
> +CONFIG_SERIAL_AMBA_PL011=y
> +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y

All three kinds of serial ports really?

> diff --git a/arch/arm/mach-bcm2708/common.c b/arch/arm/mach-bcm2708/common.c
> new file mode 100644
> index 0000000..85f19aa3
> --- /dev/null
> +++ b/arch/arm/mach-bcm2708/common.c

I think when this is the only file, we probably want to name this one bcm2708.c,
same as the platform.

> diff --git a/arch/arm/mach-bcm2708/include/mach/hardware.h b/arch/arm/mach-bcm2708/include/mach/hardware.h
> new file mode 100644
> index 0000000..2b15d0b
> --- /dev/null
> +++ b/arch/arm/mach-bcm2708/include/mach/hardware.h

No longer required.

> diff --git a/arch/arm/mach-bcm2708/include/mach/timex.h b/arch/arm/mach-bcm2708/include/mach/timex.h
> new file mode 100644
> index 0000000..ca67219
> --- /dev/null
> +++ b/arch/arm/mach-bcm2708/include/mach/timex.h

Very close to not being required any more, so you probably won't need it in 3.7.

	Arnd


From cavokz at gmail.com  Thu Sep  6 05:47:03 2012
From: cavokz at gmail.com (Domenico Andreoli)
Date: Thu, 6 Sep 2012 11:47:03 +0200
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <201209060904.14903.arnd@arndb.de>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209060904.14903.arnd@arndb.de>
Message-ID: <20120906094703.GA7308@glitch>

On Thu, Sep 06, 2012 at 09:04:14AM +0000, Arnd Bergmann wrote:
> On Thursday 06 September 2012, Stephen Warren wrote:
> 
> > Questions:
> > * It is asserted (I believe by Broadcom) that the BCM2835 is the only SoC
> >   in the series likely to see Linux support. Irrespective, those working
> >   on BCM2835 support downstream (see git URL above) have chosen to name
> >   the kernel support after the primary SoC (BCM2708) rather than the
> >   particular instance in use on the Raspberry Pi (BCM2835). I've followed
> >   that here, although I wonder if it's really the correct thing to do?
> 
> Doesn't matter too much. Depending on how different the various broadcom
> SoCs actually are, we might even name this mach-bcm and eventually try to
> merge the existing bcmring into it.

I've some stuff for the BCM4760. Working at clean-room patches, which is
easy because the reference published GPL sources [0] are based on 2.6.28 and
may look scary (190k lines of register definitions header file, completely
broken and unused monster to manage clocks, no pinctrl, old-style gpios,
reimplementation of pl011, pl080 - old style dma, to say a few).

Moreover many IP blocks are already in the kernel (PL011, PL081, sdhci,
dwc-usb2 in the device-only implementation of s3c-hsotg).

It's incomplete, has a lot of issues. sdhci and usb not working. PMU
BCM59040 is barely implemented, only regulators. But it can boot from
initramfs, minimal user space works. Yeah... a side project, mostly a
continous-study project.

I could find some similarities with something in bcmring, while grepping,
but I've never dig into it. I also quickly looked into the Raspberry PI
SoC but I could not find anything familiar.  However there could be some
code to share. I'll manage a first post of these patches if interested.

Regards,
Domenico

[0] http://www.tomtom.com/page.php?Page=gpl


From arnd at arndb.de  Thu Sep  6 11:46:44 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Thu, 6 Sep 2012 15:46:44 +0000
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <20120906094703.GA7308@glitch>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209060904.14903.arnd@arndb.de> <20120906094703.GA7308@glitch>
Message-ID: <201209061546.45242.arnd@arndb.de>

On Thursday 06 September 2012, Domenico Andreoli wrote:
> On Thu, Sep 06, 2012 at 09:04:14AM +0000, Arnd Bergmann wrote:
> > On Thursday 06 September 2012, Stephen Warren wrote:
> > 
> > > Questions:
> > > * It is asserted (I believe by Broadcom) that the BCM2835 is the only SoC
> > >   in the series likely to see Linux support. Irrespective, those working
> > >   on BCM2835 support downstream (see git URL above) have chosen to name
> > >   the kernel support after the primary SoC (BCM2708) rather than the
> > >   particular instance in use on the Raspberry Pi (BCM2835). I've followed
> > >   that here, although I wonder if it's really the correct thing to do?
> > 
> > Doesn't matter too much. Depending on how different the various broadcom
> > SoCs actually are, we might even name this mach-bcm and eventually try to
> > merge the existing bcmring into it.
> 
> I've some stuff for the BCM4760. Working at clean-room patches, which is
> easy because the reference published GPL sources [0] are based on 2.6.28 and
> may look scary (190k lines of register definitions header file, completely
> broken and unused monster to manage clocks, no pinctrl, old-style gpios,
> reimplementation of pl011, pl080 - old style dma, to say a few).

The naming gets increasingly confusing. I thought that bcm47xx were
MIPS based router chips, but it seems their number have no meaning at all.
Reminds me of IBM's four digit product codes ;-)

> Moreover many IP blocks are already in the kernel (PL011, PL081, sdhci,
> dwc-usb2 in the device-only implementation of s3c-hsotg).
> 
> It's incomplete, has a lot of issues. sdhci and usb not working. PMU
> BCM59040 is barely implemented, only regulators. But it can boot from
> initramfs, minimal user space works. Yeah... a side project, mostly a
> continous-study project.

If the code looks good, we can always merge it and see how it progresses,
maybe other people are also interested in helping out. Of course if
it just ends up being stale with nobody working on completing it,
we can remove it again just as quickly. We just had a discussion about
stale platforms at the ARM mini summit in San Diego. IMHO if a port
gets started and then nobody works on filling the gaps for two
years, we should remove it again. 

> I could find some similarities with something in bcmring, while grepping,
> but I've never dig into it. I also quickly looked into the Raspberry PI
> SoC but I could not find anything familiar.  However there could be some
> code to share. I'll manage a first post of these patches if interested.

Ok. If code for a new platform that is like bcmring were to come out of
Broadcom, I'd ask them to clean that up first and merge the two, but if
you do a cleanroom implementation, that's probably fine to go in separately.
We might actually end up removing bcmring eventually.

	Arnd


From spartacus06 at gmail.com  Thu Sep  6 12:53:26 2012
From: spartacus06 at gmail.com (Seth Jennings)
Date: Thu, 6 Sep 2012 11:53:26 -0500
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>

(sorry for the dup Stephen, forgot to reply all :-/)

On Thu, Sep 6, 2012 at 12:07 AM, Stephen Warren <swarren at wwwdotorg.org> wrote:
>
> The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
> series which contains the BCM2835 amongst other variants. This patch
> adds very basic support for this series of SoCs, under the BCM2708 name.

Great work! I'm glad to see this heading upstream :)

> This series was extracted from git://github.com/lp0/linux.git branch
> rpi-next or rpi-linear from 3-4 months ago, and significantly stripped
> down and modified since.

I've used Simon's tree before and it will boot up all the way with UART
support (no graphics, usb, network).  I also think it has a fully
populated device
tree.  Why, in particular, did you strip it down?

I'm new to the ARM SoC upstreaming scene so there might be a obvious
reason of which I'm not aware.

--
Seth


From simon at fire.lp0.eu  Thu Sep  6 18:10:45 2012
From: simon at fire.lp0.eu (Simon Arlott)
Date: Thu, 06 Sep 2012 23:10:45 +0100
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
Message-ID: <50491F65.2020302@simon.arlott.org.uk>

On 06/09/12 17:53, Seth Jennings wrote:
> (sorry for the dup Stephen, forgot to reply all :-/)
> 
> On Thu, Sep 6, 2012 at 12:07 AM, Stephen Warren <swarren at wwwdotorg.org> wrote:
>>
>> The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
>> series which contains the BCM2835 amongst other variants. This patch
>> adds very basic support for this series of SoCs, under the BCM2708 name.
> 
> Great work! I'm glad to see this heading upstream :)
> 
>> This series was extracted from git://github.com/lp0/linux.git branch
>> rpi-next or rpi-linear from 3-4 months ago, and significantly stripped
>> down and modified since.

I don't know why you're using the rpi-linear branch when the rpi-split
branch has the same content but everything already split into separate
patches...

> I've used Simon's tree before and it will boot up all the way with UART
> support (no graphics, usb, network).  I also think it has a fully
> populated device tree.

It has supported graphics for a while:
https://github.com/raspberrypi/linux/wiki/How-to-boot-using-device-tree#wiki-Configuration

I've been waiting over 3 months now for device tree support to be added
to the GPU-based bootloader and it still hasn't appeared.

> Why, in particular, did you strip it down?
> 
> I'm new to the ARM SoC upstreaming scene so there might be a obvious
> reason of which I'm not aware.
> 
> --
> Seth

-- 
Simon Arlott


From marek at xivilization.net  Thu Sep  6 19:12:11 2012
From: marek at xivilization.net (Marek Kubica)
Date: Fri, 7 Sep 2012 01:12:11 +0200
Subject: Mainline Effort
In-Reply-To: <CAG-w=x5ZRHiBBFXnRN-XxhhHKf68Ngw92MvO=ZPrztYq9FzwMQ@mail.gmail.com>
References: <CAG-w=x5ZRHiBBFXnRN-XxhhHKf68Ngw92MvO=ZPrztYq9FzwMQ@mail.gmail.com>
Message-ID: <20120907011211.4c754f37@xivilization.net>

On Sat, 21 Jul 2012 14:20:45 -0500
Seth Jennings <spartacus06 at gmail.com> wrote:

> Is there any concentrated effort going on out there to get the RPi
> platform code into the mainline kernel? I know that there has been a
> lot done for converting the platform code the device tree.

Yes, if you check the work by Simon Arlott (lp0) on GitHub as well as
the patches by Stephen Warren who split it into mainline-digestible
chunks.

(Also, your mail arrived on the list just now, reading the headers it
looks like your mail got lost and found its way to the internet a
couple months later)

regards,
Marek


From spartacus06 at gmail.com  Thu Sep  6 20:56:45 2012
From: spartacus06 at gmail.com (Seth Jennings)
Date: Thu, 6 Sep 2012 19:56:45 -0500
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <50491F65.2020302@simon.arlott.org.uk>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
 <50491F65.2020302@simon.arlott.org.uk>
Message-ID: <CAG-w=x5dbjk+9E0nWWDd9n-=bhMshMtkCnbLjzP0zufezqFgqw@mail.gmail.com>

On Thu, Sep 6, 2012 at 5:10 PM, Simon Arlott <simon at fire.lp0.eu> wrote:
> It has supported graphics for a while:
> https://github.com/raspberrypi/linux/wiki/How-to-boot-using-device-tree#wiki-Configuration

Ah yes, you are correct sir.

> I've been waiting over 3 months now for device tree support to be added
> to the GPU-based bootloader and it still hasn't appeared.

Are the attributes that are currently set by fdtput'ing on the dtb the
ones you want to get from the bootloader?  Or are there others?

I guess another way to say it is I'm interested in getting as much of
this code as we can into mainline as we can before it bitrots (which
can happen fast in on the ARM side I think).  We can make changes as
the proprietary bits catch up.

--
Seth


From swarren at wwwdotorg.org  Thu Sep  6 21:38:11 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 06 Sep 2012 19:38:11 -0600
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
Message-ID: <50495003.500@wwwdotorg.org>

On 09/06/2012 10:53 AM, Seth Jennings wrote:
> (sorry for the dup Stephen, forgot to reply all :-/)
> 
> On Thu, Sep 6, 2012 at 12:07 AM, Stephen Warren <swarren at wwwdotorg.org> wrote:
>>
>> The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
>> series which contains the BCM2835 amongst other variants. This patch
>> adds very basic support for this series of SoCs, under the BCM2708 name.
> 
> Great work! I'm glad to see this heading upstream :)
> 
>> This series was extracted from git://github.com/lp0/linux.git branch
>> rpi-next or rpi-linear from 3-4 months ago, and significantly stripped
>> down and modified since.
> 
> I've used Simon's tree before and it will boot up all the way with UART
> support (no graphics, usb, network).  I also think it has a fully
> populated device
> tree.  Why, in particular, did you strip it down?

Mainly because not stripping it down would be a huge patch or set of
patches to review at once. The smaller and more basic we start, the
easier it is to get reviewed/applied etc., and then build on incrementally.


From swarren at wwwdotorg.org  Thu Sep  6 21:52:44 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 06 Sep 2012 19:52:44 -0600
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <50491F65.2020302@simon.arlott.org.uk>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
 <50491F65.2020302@simon.arlott.org.uk>
Message-ID: <5049536C.7050300@wwwdotorg.org>

On 09/06/2012 04:10 PM, Simon Arlott wrote:
> On 06/09/12 17:53, Seth Jennings wrote:
>> (sorry for the dup Stephen, forgot to reply all :-/)
>>
>> On Thu, Sep 6, 2012 at 12:07 AM, Stephen Warren <swarren at wwwdotorg.org> wrote:
>>>
>>> The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
>>> series which contains the BCM2835 amongst other variants. This patch
>>> adds very basic support for this series of SoCs, under the BCM2708 name.
>>
>> Great work! I'm glad to see this heading upstream :)
>>
>>> This series was extracted from git://github.com/lp0/linux.git branch
>>> rpi-next or rpi-linear from 3-4 months ago, and significantly stripped
>>> down and modified since.
> 
> I don't know why you're using the rpi-linear branch when the rpi-split
> branch has the same content but everything already split into separate
> patches...

Honestly, I extracted most of this patch about 3 months ago, and don't
remember exactly which of the branches it was based on. Looking at
rpi-split, the code could just as well have come from there, so I'll
reword the commit description to mention that branch instead.


From swarren at wwwdotorg.org  Thu Sep  6 22:23:16 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 06 Sep 2012 20:23:16 -0600
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <201209060904.14903.arnd@arndb.de>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209060904.14903.arnd@arndb.de>
Message-ID: <50495A94.2060904@wwwdotorg.org>

On 09/06/2012 03:04 AM, Arnd Bergmann wrote:
> On Thursday 06 September 2012, Stephen Warren wrote:
>> The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
>> series which contains the BCM2835 amongst other variants. This patch
>> adds very basic support for this series of SoCs, under the BCM2708 name.

>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig

>> +CONFIG_SERIAL_8250=y
>> +CONFIG_SERIAL_8250_CONSOLE=y
>> +CONFIG_SERIAL_8250_NR_UARTS=48
>> +CONFIG_SERIAL_8250_RUNTIME_UARTS=32
>> +CONFIG_SERIAL_8250_EXTENDED=y
>> +CONFIG_SERIAL_8250_MANY_PORTS=y
>> +CONFIG_SERIAL_8250_SHARE_IRQ=y
>> +CONFIG_SERIAL_AMBA_PL010=y
>> +CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
>> +CONFIG_SERIAL_AMBA_PL011=y
>> +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
> 
> All three kinds of serial ports really?

The SoC does actually have two types of serial port; a PL011 which we're
using as the primary UART, and a 16C650-alike port. There's no PL010
present. I'll strip this down to just PL011 support since that's all
that's in use right now.

>> diff --git a/arch/arm/mach-bcm2708/common.c b/arch/arm/mach-bcm2708/common.c
>
> I think when this is the only file, we probably want to name this one bcm2708.c,
> same as the platform.

This was originally named bcm2708.c downstream, but I renamed it to
common.c following the example of mach-picoxcell and mach-zynq, which
IIRC you had pointed out as exemplary platforms. Still, I can rename it
back if you want.

>> diff --git a/arch/arm/mach-bcm2708/include/mach/timex.h b/arch/arm/mach-bcm2708/include/mach/timex.h
> 
> Very close to not being required any more, so you probably won't need it in 3.7.

OK. It's required right now though. I assume we should aim to check this
in for 3.7. Should I rebase this patch on top of whatever change removes
the need for timex.h? Such a patch doesn't appear to be in linux-next
right now though.


From arnd at arndb.de  Fri Sep  7 00:04:44 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Fri, 7 Sep 2012 04:04:44 +0000
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <50495A94.2060904@wwwdotorg.org>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209060904.14903.arnd@arndb.de> <50495A94.2060904@wwwdotorg.org>
Message-ID: <201209070404.45120.arnd@arndb.de>

On Friday 07 September 2012, Stephen Warren wrote:
> >> diff --git a/arch/arm/mach-bcm2708/common.c b/arch/arm/mach-bcm2708/common.c
> >
> > I think when this is the only file, we probably want to name this one bcm2708.c,
> > same as the platform.
> 
> This was originally named bcm2708.c downstream, but I renamed it to
> common.c following the example of mach-picoxcell and mach-zynq, which
> IIRC you had pointed out as exemplary platforms. Still, I can rename it
> back if you want.

It's not a big thing either way. Highbank and socfpga are also good examples
and they use the name of the platform.

> >> diff --git a/arch/arm/mach-bcm2708/include/mach/timex.h b/arch/arm/mach-bcm2708/include/mach/timex.h
> > 
> > Very close to not being required any more, so you probably won't need it in 3.7.
> 
> OK. It's required right now though. I assume we should aim to check this
> in for 3.7. Should I rebase this patch on top of whatever change removes
> the need for timex.h? Such a patch doesn't appear to be in linux-next
> right now though.

Let's not worry about it for now, it's easy enough to remove later.

	Arnd


From swarren at wwwdotorg.org  Sat Sep  8 01:48:04 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Fri,  7 Sep 2012 23:48:04 -0600
Subject: [PATCH V2] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
Message-ID: <1347083284-17799-1-git-send-email-swarren@wwwdotorg.org>

The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
series which contains the BCM2835 amongst other variants. This patch
adds very basic support for this series of SoCs, under the BCM2708 name.

http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd

Note that the documentation in the latter .pdf assumes the MMU setup that's
used on the "VideoCore" companion processor, and does not document physical
peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses.

The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
minimal device tree for this board; enough to see some very early kernel
boot messages through earlyprintk.

http://www.raspberrypi.org/.

This series was extracted from git://github.com/lp0/linux.git branch
rpi-split from 3-4 months ago, and significantly stripped down and
modified since. The work in that branch was signed-off-by:

    Chris Boot <bootc at bootc.net>
    Simon Arlott <sa.me.uk> [sic]

Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
v2:
* Rename *_BASE to *_PHYS to match Simon's rpi-split branch.
* Remove #define UART_BAUD since it isn't used.
* Don't select WATCHDOG from ARCH_BCM2708
* Remove 8250 and PL010 serial ports from bcm2708_defconfig
* Remove <mach/hardware.h>
* Rename common.c back to bcm2708.c; matches downstream and is
  preferred naming style.
---
 arch/arm/Kconfig                                 |   18 +++++
 arch/arm/Makefile                                |    1 +
 arch/arm/boot/dts/bcm2835-rpi-b.dts              |   12 +++
 arch/arm/boot/dts/bcm2835.dtsi                   |   10 +++
 arch/arm/configs/bcm2708_defconfig               |   93 ++++++++++++++++++++++
 arch/arm/mach-bcm2708/Makefile                   |    1 +
 arch/arm/mach-bcm2708/Makefile.boot              |    5 ++
 arch/arm/mach-bcm2708/bcm2708.c                  |   80 +++++++++++++++++++
 arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h |   29 +++++++
 arch/arm/mach-bcm2708/include/mach/debug-macro.S |   24 ++++++
 arch/arm/mach-bcm2708/include/mach/timex.h       |   26 ++++++
 arch/arm/mach-bcm2708/include/mach/uncompress.h  |   48 +++++++++++
 12 files changed, 347 insertions(+)
 create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2835.dtsi
 create mode 100644 arch/arm/configs/bcm2708_defconfig
 create mode 100644 arch/arm/mach-bcm2708/Makefile
 create mode 100644 arch/arm/mach-bcm2708/Makefile.boot
 create mode 100644 arch/arm/mach-bcm2708/bcm2708.c
 create mode 100644 arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-bcm2708/include/mach/timex.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/uncompress.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d0021fe..4dcd0cd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -349,6 +349,24 @@ config ARCH_AT91
 	  This enables support for systems based on Atmel
 	  AT91RM9200 and AT91SAM9* processors.
 
+config ARCH_BCM2708
+	bool "Broadcom BCM2708 family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_ERRATA_411920
+	select ARM_TIMER_SP804
+	select CLKDEV_LOOKUP
+	select COMMON_CLK
+	select CPU_V6
+	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  This enables support for the Broadcom BCM2708 SoC series. The
+	  BCM2835 is one such SoC in this series. The Raspberry Pi uses
+	  the BCM2835.
+
 config ARCH_BCMRING
 	bool "Broadcom BCMRING"
 	depends on MMU
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a812d12..3c4f0b3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -136,6 +136,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)		:= at91
+machine-$(CONFIG_ARCH_BCM2708)		:= bcm2708
 machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)		:= cns3xxx
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
new file mode 100644
index 0000000..7e43197
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/memreserve/ 0x0c000000 0x04000000;
+/include/ "bcm2835.dtsi"
+
+/ {
+	model = "Raspberry Pi Model B";
+	compatible = "raspberrypi,model-b", "broadcom,bcm2835", "broadcom,bcm2708";
+
+	memory {
+		reg = <0 0x10000000>;
+	};
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
new file mode 100644
index 0000000..221a49a
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -0,0 +1,10 @@
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "broadcom,bcm2835", "broadcom,bcm2708";
+	model = "BCM2835";
+
+	chosen {
+		bootargs = "earlyprintk";			/* Set by VideoCore */
+	};
+};
diff --git a/arch/arm/configs/bcm2708_defconfig b/arch/arm/configs/bcm2708_defconfig
new file mode 100644
index 0000000..6f741e9
--- /dev/null
+++ b/arch/arm/configs/bcm2708_defconfig
@@ -0,0 +1,93 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_BLOCK is not set
+CONFIG_ARCH_BCM2708=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_COMPACTION=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_CLEANCACHE=y
+CONFIG_SECCOMP=y
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_PRINTK_TIME=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_BOOT_PRINTK_DELAY=y
+CONFIG_SCHED_TRACER=y
+CONFIG_STACK_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_KGDB=y
+CONFIG_KGDB_KDB=y
+CONFIG_TEST_KSTRTOX=y
+CONFIG_STRICT_DEVMEM=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile
new file mode 100644
index 0000000..c382763
--- /dev/null
+++ b/arch/arm/mach-bcm2708/Makefile
@@ -0,0 +1 @@
+obj-y += bcm2708.o
diff --git a/arch/arm/mach-bcm2708/Makefile.boot b/arch/arm/mach-bcm2708/Makefile.boot
new file mode 100644
index 0000000..0831fd1
--- /dev/null
+++ b/arch/arm/mach-bcm2708/Makefile.boot
@@ -0,0 +1,5 @@
+   zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
+
+dtb-y += bcm2835-rpi-b.dtb
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
new file mode 100644
index 0000000..9ef680f
--- /dev/null
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/exception.h>
+
+#include <mach/bcm2708_soc.h>
+
+static struct map_desc io_map __initdata = {
+	.virtual = BCM2708_PERIPH_VIRT,
+	.pfn = __phys_to_pfn(BCM2708_PERIPH_PHYS),
+	.length = BCM2708_PERIPH_SIZE,
+	.type = MT_DEVICE
+};
+
+void __init bcm2708_map_io(void)
+{
+	iotable_init(&io_map, 1);
+}
+
+void __init bcm2708_init_irq(void)
+{
+}
+
+asmlinkage void __exception_irq_entry bcm2708_handle_irq(struct pt_regs *regs)
+{
+}
+
+void __init bcm2708_init(void)
+{
+	int ret;
+
+	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
+				   NULL);
+	if (ret) {
+		pr_err("of_platform_populate failed: %d\n", ret);
+		BUG();
+	}
+}
+
+static void __init bcm2708_timer_init(void)
+{
+}
+
+struct sys_timer bcm2708_timer = {
+	.init = bcm2708_timer_init
+};
+
+static const char * const bcm2708_compat[] = {
+	"broadcom,bcm2708",
+	NULL
+};
+
+DT_MACHINE_START(BCM2708, "BCM2708")
+	.map_io = bcm2708_map_io,
+	.init_irq = bcm2708_init_irq,
+	.handle_irq = bcm2708_handle_irq,
+	.init_machine = bcm2708_init,
+	.timer = &bcm2708_timer,
+	.dt_compat = bcm2708_compat
+MACHINE_END
diff --git a/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h b/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
new file mode 100644
index 0000000..3549699
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_BCM2708_BCM2708_SOC_H__
+#define __MACH_BCM2708_BCM2708_SOC_H__
+
+#include <asm/sizes.h>
+
+#define BCM2708_PERIPH_PHYS	0x20000000
+#define BCM2708_PERIPH_VIRT	0xf0000000
+#define BCM2708_PERIPH_SIZE	SZ_16M
+#define BCM2708_DEBUG_PHYS	0x20201000
+#define BCM2708_DEBUG_VIRT	0xf0201000
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/debug-macro.S b/arch/arm/mach-bcm2708/include/mach/debug-macro.S
new file mode 100644
index 0000000..962f4d1
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/debug-macro.S
@@ -0,0 +1,24 @@
+/*
+ * Debugging macro include header
+ *
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ *  Copyright (C) 2010 Broadcom
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <mach/bcm2708_soc.h>
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rp, =BCM2708_DEBUG_PHYS
+	ldr	\rv, =BCM2708_DEBUG_VIRT
+	.endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-bcm2708/include/mach/timex.h b/arch/arm/mach-bcm2708/include/mach/timex.h
new file mode 100644
index 0000000..ca67219
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/timex.h
@@ -0,0 +1,26 @@
+/*
+ *  BCM2708 system clock frequency
+ *
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+#define CLOCK_TICK_RATE		(1000000)
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/uncompress.h b/arch/arm/mach-bcm2708/include/mach/uncompress.h
new file mode 100644
index 0000000..919bff7
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/uncompress.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/amba/serial.h>
+#include <mach/bcm2708_soc.h>
+
+#define UART0_BASE BCM2708_DEBUG_PHYS
+
+#define BCM2708_UART_DR IOMEM(UART0_BASE + UART01x_DR)
+#define BCM2708_UART_FR IOMEM(UART0_BASE + UART01x_FR)
+#define BCM2708_UART_CR IOMEM(UART0_BASE + UART011_CR)
+
+static inline void putc(int c)
+{
+	while (__raw_readl(BCM2708_UART_FR) & UART01x_FR_TXFF)
+		barrier();
+
+	__raw_writel(c, BCM2708_UART_DR);
+}
+
+static inline void flush(void)
+{
+	int fr;
+
+	do {
+		fr = __raw_readl(BCM2708_UART_FR);
+		barrier();
+	} while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE);
+}
+
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
-- 
1.7.9.5



From simon at fire.lp0.eu  Sat Sep  8 08:37:01 2012
From: simon at fire.lp0.eu (Simon Arlott)
Date: Sat, 08 Sep 2012 13:37:01 +0100
Subject: [PATCH V2] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <1347083284-17799-1-git-send-email-swarren@wwwdotorg.org>
References: <1347083284-17799-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <504B3BED.9080204@simon.arlott.org.uk>

On 08/09/12 06:48, Stephen Warren wrote:
> +void __init bcm2708_init_irq(void)
> +{
> +}
...
> +static void __init bcm2708_timer_init(void)
> +{
> +}

There's no timer and no interrupt handler so it won't even finish
booting. It's going to stall when it tries to calculate loops per jiffy.

I don't know what you're trying to achieve. This does not add support
for the BCM2708.

See https://github.com/lp0/linux/commits/rpi-split from June 21 onwards
for separate patch commits that apply to specific devices.


On 08/09/12 06:48, Stephen Warren wrote:
> v2:
> * Rename *_BASE to *_PHYS to match Simon's rpi-split branch.

You've definitely used the rpi-linear branch if you're missing things.
The HEAD of the two branches is identical but rpi-split has a rebased
history.

-- 
Simon Arlott


From spartacus06 at gmail.com  Sat Sep  8 12:25:36 2012
From: spartacus06 at gmail.com (Seth Jennings)
Date: Sat, 8 Sep 2012 11:25:36 -0500
Subject: [PATCH V2] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <504B3BED.9080204@simon.arlott.org.uk>
References: <1347083284-17799-1-git-send-email-swarren@wwwdotorg.org>
 <504B3BED.9080204@simon.arlott.org.uk>
Message-ID: <CAG-w=x6vm6Ei_EvXovvZL3gbYsh7ozjD0XOUJq7S5-L5B6xuhQ@mail.gmail.com>

On Sat, Sep 8, 2012 at 7:37 AM, Simon Arlott <simon at fire.lp0.eu> wrote:
> I don't know what you're trying to achieve. This does not add support
> for the BCM2708.

If you don't like this patch, could we get a patch(set) from you since
you're code is the origin for this work?

I understand that there is some bootloader support missing, but surely
we can get some support into mainline now, right?

I just don't want this work to rot.

Seth


From popcornmix at gmail.com  Sat Sep  8 13:12:49 2012
From: popcornmix at gmail.com (popcornmix)
Date: Sat, 8 Sep 2012 18:12:49 +0100
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <50491F65.2020302@simon.arlott.org.uk>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
 <50491F65.2020302@simon.arlott.org.uk>
Message-ID: <CAEi1pCTvXTbbNX8iDDKB_YtRTVeiSqf9y_cO2AjqtDCdBbK7qA@mail.gmail.com>

On Thu, Sep 6, 2012 at 11:10 PM, Simon Arlott <simon at fire.lp0.eu> wrote:
> I've been waiting over 3 months now for device tree support to be added
> to the GPU-based bootloader and it still hasn't appeared.

Sorry Simon, I thought the device tree support was complete, apart
from requiring the command line in the device tree file to be padded
with spaces.
I didn't realise it was holding anything up. I can look into this -
was there anything else missing?


From swarren at wwwdotorg.org  Sat Sep  8 13:41:45 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 08 Sep 2012 11:41:45 -0600
Subject: [PATCH V2] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <504B3BED.9080204@simon.arlott.org.uk>
References: <1347083284-17799-1-git-send-email-swarren@wwwdotorg.org>
 <504B3BED.9080204@simon.arlott.org.uk>
Message-ID: <504B8359.80403@wwwdotorg.org>

On 09/08/2012 06:37 AM, Simon Arlott wrote:
> On 08/09/12 06:48, Stephen Warren wrote:
>> +void __init bcm2708_init_irq(void)
>> +{
>> +}
> ...
>> +static void __init bcm2708_timer_init(void)
>> +{
>> +}
> 
> There's no timer and no interrupt handler so it won't even finish
> booting. It's going to stall when it tries to calculate loops per jiffy.

Yes, I did mention this when I posted V1. Perhaps it's worth mentioning
in the commit description itself too.

> I don't know what you're trying to achieve. This does not add support
> for the BCM2708.

I'm trying to get upstreaming started, a little bit at a time. Right
now, all work has been done outside the regular Linux ARM community. I
feel it'd be much better to start feeding the work upstream. This will
provide much better exposure for the work, and put it into a place
that's more obvious for users, and useful for distros.

Obviously, the next step after this patch is to upstream the interrupt
controller and timer, to resolve the problem mentioned above. There's
certainly still much more to do after that.

> See https://github.com/lp0/linux/commits/rpi-split from June 21 onwards
> for separate patch commits that apply to specific devices.
> 
> On 08/09/12 06:48, Stephen Warren wrote:
>> v2:
>> * Rename *_BASE to *_PHYS to match Simon's rpi-split branch.
> 
> You've definitely used the rpi-linear branch if you're missing things.
> The HEAD of the two branches is identical but rpi-split has a rebased
> history.

No, I just took the HEAD of the branch, and manually copied minimal
pieces out of it to create this patch; the interim contents of any of
the patches in the branches didn't influence this patch at all.

BTW, could you possibly fix your git configuration so that your commits
have a valid email address in the git author field and Signed-off-by
tag? For this patch, I set the git author field to myself even though
you (and others) authored the work it was derived from, since I didn't
feel comfortable using the invalid values from your git repo.

Thanks for the interest in these patches!


From swarren at wwwdotorg.org  Sat Sep  8 13:48:19 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 08 Sep 2012 11:48:19 -0600
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <CAEi1pCTvXTbbNX8iDDKB_YtRTVeiSqf9y_cO2AjqtDCdBbK7qA@mail.gmail.com>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
 <50491F65.2020302@simon.arlott.org.uk>
 <CAEi1pCTvXTbbNX8iDDKB_YtRTVeiSqf9y_cO2AjqtDCdBbK7qA@mail.gmail.com>
Message-ID: <504B84E3.1030709@wwwdotorg.org>

On 09/08/2012 11:12 AM, popcornmix wrote:
> On Thu, Sep 6, 2012 at 11:10 PM, Simon Arlott <simon at fire.lp0.eu> wrote:
>> I've been waiting over 3 months now for device tree support to be added
>> to the GPU-based bootloader and it still hasn't appeared.
> 
> Sorry Simon, I thought the device tree support was complete, apart
> from requiring the command line in the device tree file to be padded
> with spaces.
> I didn't realise it was holding anything up. I can look into this -
> was there anything else missing?

(hijacking the thread a little; sorry)

Popcornmix, I notice that a number of commits in Simon's repo are
Signed-off-by yourself. However, those S-o-b tags use the alias
"popcornmix" rather than your real name, and hence aren't considered
valid by upstream. It'd be great if you could give your permission to
Simon to rebase his branch and update all those tags with your real
name, or give others permission to rewrite your existing S-o-b tags with
your real name when taking those patches and sending them upstream.

Thanks.


From popcornmix at gmail.com  Sat Sep  8 13:53:07 2012
From: popcornmix at gmail.com (popcornmix)
Date: Sat, 8 Sep 2012 18:53:07 +0100
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <504B84E3.1030709@wwwdotorg.org>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <CAG-w=x77y6ykh3FcyTtVAN85eOk1RP2CZ=ZG-_1091i5jYDF2A@mail.gmail.com>
 <50491F65.2020302@simon.arlott.org.uk>
 <CAEi1pCTvXTbbNX8iDDKB_YtRTVeiSqf9y_cO2AjqtDCdBbK7qA@mail.gmail.com>
 <504B84E3.1030709@wwwdotorg.org>
Message-ID: <CAEi1pCSvk9y2jixTJH4QCNiPGidb_H6kNBNoVXuZY7u-a-Zf5A@mail.gmail.com>

On Sat, Sep 8, 2012 at 6:48 PM, Stephen Warren <swarren at wwwdotorg.org> wrote:
> Popcornmix, I notice that a number of commits in Simon's repo are
> Signed-off-by yourself. However, those S-o-b tags use the alias
> "popcornmix" rather than your real name, and hence aren't considered
> valid by upstream. It'd be great if you could give your permission to
> Simon to rebase his branch and update all those tags with your real
> name, or give others permission to rewrite your existing S-o-b tags with
> your real name when taking those patches and sending them upstream.

No problem. Permission is granted to change the alias popcornmix to Dom Cobley.


From arnd at arndb.de  Sat Sep  8 15:27:47 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Sat, 08 Sep 2012 19:27:47 +0000
Subject: [PATCH V2] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <504B8359.80403@wwwdotorg.org>
References: <1347083284-17799-1-git-send-email-swarren@wwwdotorg.org>
 <504B3BED.9080204@simon.arlott.org.uk> <504B8359.80403@wwwdotorg.org>
Message-ID: <9292467.5Y4vCKkKhh@wuerfel>

On Saturday 08 September 2012 11:41:45 Stephen Warren wrote:
> On 09/08/2012 06:37 AM, Simon Arlott wrote:
> > On 08/09/12 06:48, Stephen Warren wrote:
> 
> > I don't know what you're trying to achieve. This does not add support
> > for the BCM2708.
> 
> I'm trying to get upstreaming started, a little bit at a time. Right
> now, all work has been done outside the regular Linux ARM community. I
> feel it'd be much better to start feeding the work upstream. This will
> provide much better exposure for the work, and put it into a place
> that's more obvious for users, and useful for distros.
> 
> Obviously, the next step after this patch is to upstream the interrupt
> controller and timer, to resolve the problem mentioned above. There's
> certainly still much more to do after that.

I think it would be good to get those reviewed and submitted in time for
the merge window, to have something that actually boots.

I agree that for review purposes starting out with just the minimal patch
was a good idea, but when the other stuff looks reasonable, we should also
try to get it in at the same time.

	Arnd


From linux at arm.linux.org.uk  Sat Sep  8 17:56:10 2012
From: linux at arm.linux.org.uk (Russell King - ARM Linux)
Date: Sat, 8 Sep 2012 22:56:10 +0100
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <201209061546.45242.arnd@arndb.de>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209060904.14903.arnd@arndb.de> <20120906094703.GA7308@glitch>
 <201209061546.45242.arnd@arndb.de>
Message-ID: <20120908215609.GH13739@n2100.arm.linux.org.uk>

On Thu, Sep 06, 2012 at 03:46:44PM +0000, Arnd Bergmann wrote:
> We just had a discussion about
> stale platforms at the ARM mini summit in San Diego. IMHO if a port
> gets started and then nobody works on filling the gaps for two
> years, we should remove it again. 

One of the issues there is that you don't know if the reason it's not
receiving patches or comments is because it works and people are using
it, and they don't have anything to report against it.

That's certainly true of a number of platforms we currently have.

And then there's the ones I run services on which I don't tend to reboot
very often.  I'm currently looking at one which is coming up to 1000 days
uptime which has had zero problems on a 2.6.32.8 kernel - in fact it's
the one which provides www.arm.linux.org.uk and I'm typing this email
message on...

 22:54:19 up 938 days,  9:27, 11 users,  load average: 0.21, 0.08, 0.01

so in that case I'm not going to know if anything is broken on an IOP32x
kernel until that gets rebooted (which it will do soon because I want to
change its disks - but hopefully not before 62 days time.)


From cavokz at gmail.com  Sat Sep  8 20:30:27 2012
From: cavokz at gmail.com (Domenico Andreoli)
Date: Sun, 9 Sep 2012 02:30:27 +0200
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <20120908215609.GH13739@n2100.arm.linux.org.uk>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209060904.14903.arnd@arndb.de> <20120906094703.GA7308@glitch>
 <201209061546.45242.arnd@arndb.de>
 <20120908215609.GH13739@n2100.arm.linux.org.uk>
Message-ID: <20120909003027.GB13519@glitch>

On Sat, Sep 08, 2012 at 10:56:10PM +0100, Russell King - ARM Linux wrote:
> On Thu, Sep 06, 2012 at 03:46:44PM +0000, Arnd Bergmann wrote:
> > We just had a discussion about
> > stale platforms at the ARM mini summit in San Diego. IMHO if a port
> > gets started and then nobody works on filling the gaps for two
> > years, we should remove it again. 
> 
> One of the issues there is that you don't know if the reason it's not
> receiving patches or comments is because it works and people are using
> it, and they don't have anything to report against it.
> 
> That's certainly true of a number of platforms we currently have.

I would also like to know the usefulness/completeness requirements of
new platforms.

Expecting the latest designs in each area, what is wanted for a first
submission, besides the core stuff required for booting?

 - clocks
 - gpios
 - pinctrl
 - devicetree
 - uarts
 - dma
 - i2c
 - ...

For instance, I'm absolutely not interested in audio, displays and GPUs at
the moment, at least not those equipping this board. So I will not spend
any time to contribute anything of them. Would this be a stopper?

Regards,
Domenico


From olof at lixom.net  Sat Sep  8 20:52:27 2012
From: olof at lixom.net (Olof Johansson)
Date: Sat, 8 Sep 2012 17:52:27 -0700
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <20120908215609.GH13739@n2100.arm.linux.org.uk>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209060904.14903.arnd@arndb.de> <20120906094703.GA7308@glitch>
 <201209061546.45242.arnd@arndb.de>
 <20120908215609.GH13739@n2100.arm.linux.org.uk>
Message-ID: <CAOesGMi3Bht42ooGx3Es3DN5khO9f+J38kXK4+wDyRjbvQBUeQ@mail.gmail.com>

On Sat, Sep 8, 2012 at 2:56 PM, Russell King - ARM Linux
<linux at arm.linux.org.uk> wrote:
> On Thu, Sep 06, 2012 at 03:46:44PM +0000, Arnd Bergmann wrote:
>> We just had a discussion about
>> stale platforms at the ARM mini summit in San Diego. IMHO if a port
>> gets started and then nobody works on filling the gaps for two
>> years, we should remove it again.
>
> One of the issues there is that you don't know if the reason it's not
> receiving patches or comments is because it works and people are using
> it, and they don't have anything to report against it.
>
> That's certainly true of a number of platforms we currently have.

No one is interested in removing a platform that is used, but it has
been somewhat discouraging when there have been long-standing build
breakages even on defconfigs for some of them. Without rattling the
cage a bit, it's hard to find out if anyone actually cares about them
enough to build and boot an upstream kernel at least every release or
so.

And yes, in some cases they definitely do. Just see ks8695 as of the
last week -- we've even got someone stepping up to take on
maintainership (thanks Greg!).

-Olof


From arnd at arndb.de  Sat Sep  8 21:16:54 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Sun, 09 Sep 2012 01:16:54 +0000
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <20120908215609.GH13739@n2100.arm.linux.org.uk>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209061546.45242.arnd@arndb.de>
 <20120908215609.GH13739@n2100.arm.linux.org.uk>
Message-ID: <1729018.3VWhxcipzn@wuerfel>

On Saturday 08 September 2012 22:56:10 Russell King - ARM Linux wrote:
> On Thu, Sep 06, 2012 at 03:46:44PM +0000, Arnd Bergmann wrote:
> > We just had a discussion about
> > stale platforms at the ARM mini summit in San Diego. IMHO if a port
> > gets started and then nobody works on filling the gaps for two
> > years, we should remove it again. 
> 
> One of the issues there is that you don't know if the reason it's not
> receiving patches or comments is because it works and people are using
> it, and they don't have anything to report against it.
> 
> That's certainly true of a number of platforms we currently have.
> 
> And then there's the ones I run services on which I don't tend to reboot
> very often.  I'm currently looking at one which is coming up to 1000 days
> uptime which has had zero problems on a 2.6.32.8 kernel - in fact it's
> the one which provides www.arm.linux.org.uk and I'm typing this email
> message on...
> 
>  22:54:19 up 938 days,  9:27, 11 users,  load average: 0.21, 0.08, 0.01
> 
> so in that case I'm not going to know if anything is broken on an IOP32x
> kernel until that gets rebooted (which it will do soon because I want to
> change its disks - but hopefully not before 62 days time.)

I was specifically saying "a port gets started", not "a port is fully
working". The example I was thinking of is the mach-cns3xxx, which 
was introduced in a very minimal state about 2 years ago. The only
users I could find on the internet are on OpenWRT, which adds
support for an actual board file (upstream only has the evaluation
board) as well as SMP, clock, i2c, ethernet, gpio, and a bunch of
bug fixes[1]. I'd say we should either find someone who is willing to
submit the patches upstream and make sure they work with at least
one version, or we can remove what we have today because it's evidently
not used.

Of course, one of the main rules of Linux development is that we
don't break stuff, so whenever we remove something that looks like
it's not used and someone complains, we should revert the patch
to put the code back ASAP.

The platforms that we talked about removing during the ARM mini summit
are ks8695, h720x, l7200, netx, pnx4008, w90x900, ixp4xx and bcmring.
I've already heard back from people involved in almost all of those, with
pretty clear statements:

* ks8695 is in active use, but was missing a maintainer. Greg Ungerer
stepped up and already submitted new board files for hardware that he
is using.

* ixp4xx is (as expected) actively used, but a lot of patches are stuck
in openwrt[2] and not getting submitted.
Greg also submitted a regression fix, Ben Hutchins promised
another fix from Debian.

* h720x is pretty much dead, the original authors seem to not
be interested any more, we just need to decide how and when to
remove it.

* netx is used happily and just needs a contact address.

* pnx4008 is very dead and getting removed in 3.7.

* bcmring is getting orphaned and will likely get removed if nobody
steps up as a maintainer to clean it up.

* l7200 was already removed two years ago and a single file has crept back
in from a bad merge without anyone noticing.

* no news from w90x900, still need to contact the people who were last
working on them. May still be alive considering that we removed it's
nuc900 sibling and the maintainers were still active on it back then.
A quick online search shows that the chip is actively being marketed
and there is a BSP that adds a few device drivers (usbgadget, i2c, asoc,
[Cc'd Wan ZongShun, the maintainer, on this email]

	Arnd

[1] https://dev.openwrt.org/browser/trunk/target/linux/cns3xxx/patches-3.3
[2] https://dev.openwrt.org/browser/trunk/target/linux/ixp4xx/patches-3.3


From arnd at arndb.de  Sat Sep  8 21:34:42 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Sun, 09 Sep 2012 01:34:42 +0000
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <20120909003027.GB13519@glitch>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <20120908215609.GH13739@n2100.arm.linux.org.uk>
 <20120909003027.GB13519@glitch>
Message-ID: <2862099.nQ3UIKtPXP@wuerfel>

On Sunday 09 September 2012 02:30:27 Domenico Andreoli wrote:
> On Sat, Sep 08, 2012 at 10:56:10PM +0100, Russell King - ARM Linux wrote:
> > On Thu, Sep 06, 2012 at 03:46:44PM +0000, Arnd Bergmann wrote:
> > > We just had a discussion about
> > > stale platforms at the ARM mini summit in San Diego. IMHO if a port
> > > gets started and then nobody works on filling the gaps for two
> > > years, we should remove it again. 
> > 
> > One of the issues there is that you don't know if the reason it's not
> > receiving patches or comments is because it works and people are using
> > it, and they don't have anything to report against it.
> > 
> > That's certainly true of a number of platforms we currently have.
> 
> I would also like to know the usefulness/completeness requirements of
> new platforms.
> 
> Expecting the latest designs in each area, what is wanted for a first
> submission, besides the core stuff required for booting?
> 
>  - clocks
>  - gpios
>  - pinctrl
>  - devicetree
>  - uarts
>  - dma
>  - i2c
>  - ...
> 
> For instance, I'm absolutely not interested in audio, displays and GPUs at
> the moment, at least not those equipping this board. So I will not spend
> any time to contribute anything of them. Would this be a stopper?

The only real requirements that I have for new platforms are

a) the code has to look reasonable and follow the quality standards,
in particular using all the generic subsystems (e.g. irqchip,
clocksource, common-clock, mtd, pinctrl, dmaengine, asoc, regulator,
pwm) where applicable. You don't have to use all of them, but if
you have a driver for one of these, you must use the common code
instead of reimplementing it differently.

b) a commitment from the submitter to keep looking after the platform,
and review bug fixes and other code changes that are submitted by
other people.

There is no need for an initial submission to be complete in any way.
In fact I would argue that basically none of the big ARMv7 platforms
(omap, exynos, imx, ux500, msm, mmp, ...) are complete because they
are all lacking proper graphics drivers. 

Having the first version be able to boot to a shell prompt is certainly
a good thing, but I would put the entry bar as low as possible really
and rather take nice looking work-in-progress code early than review a
large amount of code all at once and have to tell the submitters that
they got something fundamentally wrong and need to redo everything.

	Arnd


From kaloz at openwrt.org  Sun Sep  9 04:46:34 2012
From: kaloz at openwrt.org (Imre Kaloz)
Date: Sun, 09 Sep 2012 10:46:34 +0200
Subject: [PATCH] ARM: add support for BCM2708/BCM2835 and Raspberry Pi
In-Reply-To: <1729018.3VWhxcipzn@wuerfel>
References: <1346908038-22421-1-git-send-email-swarren@wwwdotorg.org>
 <201209061546.45242.arnd@arndb.de>
 <20120908215609.GH13739@n2100.arm.linux.org.uk> <1729018.3VWhxcipzn@wuerfel>
Message-ID: <op.wkc1bwjx2s3iss@ecaz>

On Sun, 09 Sep 2012 03:16:54 +0200, Arnd Bergmann <arnd at arndb.de> wrote:

<snip>

>> so in that case I'm not going to know if anything is broken on an IOP32x
>> kernel until that gets rebooted (which it will do soon because I want to
>> change its disks - but hopefully not before 62 days time.)
>
> I was specifically saying "a port gets started", not "a port is fully
> working". The example I was thinking of is the mach-cns3xxx, which
> was introduced in a very minimal state about 2 years ago. The only
> users I could find on the internet are on OpenWRT, which adds
> support for an actual board file (upstream only has the evaluation
> board) as well as SMP, clock, i2c, ethernet, gpio, and a bunch of
> bug fixes[1]. I'd say we should either find someone who is willing to
> submit the patches upstream and make sure they work with at least
> one version, or we can remove what we have today because it's evidently
> not used.

For some time now you have to have clocks support to be able to get SMP  
and co working. Without that and DT it doesn't really make sense to submit  
those patches.

<snip>

> * ixp4xx is (as expected) actively used, but a lot of patches are stuck
> in openwrt[2] and not getting submitted.
> Greg also submitted a regression fix, Ben Hutchins promised
> another fix from Debian.

Mostly the same as above. Don't forget that DT support will essentially  
get rid of all separate board support files, so those patches will have to  
be translated to dts files instead.

Since I'm doing all the OpenWrt work (as well as upstreaming non-ARM  
stuff) in my free time, things got stuck and will likely stay that way for  
another month or so.


Imre


From swarren at wwwdotorg.org  Wed Sep 12 00:18:29 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Tue, 11 Sep 2012 22:18:29 -0600
Subject: [PATCH V3 5/5] ARM: bcm2708: instantiate console UART
In-Reply-To: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347423509-30647-5-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Modified UART DT node to use a unit-address to differentiate UART node
  names, rather than using different base names "uart0" and "uart1".
  Note that UART 1 (the Broadcom "mini UART") is not yet present, but
  I'm naming the DT node in anticipation that it will be added.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
--
v3: New patch.
---
 arch/arm/boot/dts/bcm2835.dtsi |    9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 3e8ea51..05b1a37 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -6,7 +6,7 @@
 	interrupt-parent = <&intc>;
 
 	chosen {
-		bootargs = "earlyprintk";
+		bootargs = "earlyprintk console=ttyAMA0";
 	};
 
 	timer {
@@ -22,4 +22,11 @@
 		interrupt-controller;
 		#interrupt-cells = <2>;
 	};
+
+	uart at 20201000 {
+		compatible = "broadcom,bcm2835-pl011", "broadcom,bcm2708-pl011", "arm,pl011", "arm,primecell";
+		reg = <0x20201000 0x1000>;
+		interrupts = <2 25>;
+		clock-frequency = <3000000>;
+	};
 };
-- 
1.7.9.5



From swarren at wwwdotorg.org  Wed Sep 12 00:18:28 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Tue, 11 Sep 2012 22:18:28 -0600
Subject: [PATCH V3 4/5] ARM: bcm2708: add stub clock driver
In-Reply-To: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347423509-30647-4-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

This patch adds a minimal stub clock driver for the BCM2708. Its sole
purpose is to allow the PL011 AMBA clk_get() API calls to provide
something that looks enough like a clock that the driver probes and
operates correctly.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Modified .dev_id for UART clocks to match UART DT node names.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
--
v3: New patch.
---
 arch/arm/mach-bcm2708/Makefile  |    1 +
 arch/arm/mach-bcm2708/bcm2708.c |    3 +++
 arch/arm/mach-bcm2708/clock.c   |   53 +++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-bcm2708/clock.h   |   24 ++++++++++++++++++
 4 files changed, 81 insertions(+)
 create mode 100644 arch/arm/mach-bcm2708/clock.c
 create mode 100644 arch/arm/mach-bcm2708/clock.h

diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile
index 597f811..4902453 100644
--- a/arch/arm/mach-bcm2708/Makefile
+++ b/arch/arm/mach-bcm2708/Makefile
@@ -1,2 +1,3 @@
 obj-y += bcm2708.o
+obj-y += clock.o
 obj-y += irq.o
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
index 8ee11d9..05a3fc1 100644
--- a/arch/arm/mach-bcm2708/bcm2708.c
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -22,6 +22,7 @@
 
 #include <mach/bcm2708_soc.h>
 
+#include "clock.h"
 #include "irq.h"
 
 static struct map_desc io_map __initdata = {
@@ -40,6 +41,8 @@ void __init bcm2708_init(void)
 {
 	int ret;
 
+	bcm2708_init_clocks();
+
 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
 				   NULL);
 	if (ret) {
diff --git a/arch/arm/mach-bcm2708/clock.c b/arch/arm/mach-bcm2708/clock.c
new file mode 100644
index 0000000..83b26ec
--- /dev/null
+++ b/arch/arm/mach-bcm2708/clock.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-private.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+
+#include "clock.h"
+
+/*
+ * These are fixed clocks (and device tree doesn't support clk!).
+ *
+ * They're probably not all root clocks and it may be possible to
+ * turn them on and off but until this is mapped out better it's
+ * the only way they can be used.
+ */
+DEFINE_CLK_FIXED_RATE(sys_pclk,   CLK_IS_ROOT, 250000000, 0);
+DEFINE_CLK_FIXED_RATE(apb_pclk,   CLK_IS_ROOT, 126000000, 0);
+DEFINE_CLK_FIXED_RATE(uart0_pclk, CLK_IS_ROOT,   3000000, 0);
+DEFINE_CLK_FIXED_RATE(uart1_pclk, CLK_IS_ROOT, 125000000, 0);
+
+static struct clk_lookup lookups[] = {
+	{ .con_id = "sys_pclk", .clk = &sys_pclk },
+	{ .con_id = "apb_pclk", .clk = &apb_pclk },
+	{ .dev_id = "20201000.uart", .clk = &uart0_pclk },
+	{ .dev_id = "20215000.uart", .clk = &uart1_pclk }
+};
+
+void __init bcm2708_init_clocks(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+		__clk_init(NULL, lookups[i].clk);
+		clkdev_add(&lookups[i]);
+	}
+}
diff --git a/arch/arm/mach-bcm2708/clock.h b/arch/arm/mach-bcm2708/clock.h
new file mode 100644
index 0000000..8670060
--- /dev/null
+++ b/arch/arm/mach-bcm2708/clock.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __BCM2708_CLOCK_H
+#define __BCM2708_CLOCK_H
+
+void __init bcm2708_init_clocks(void);
+
+#endif
-- 
1.7.9.5



From swarren at wwwdotorg.org  Wed Sep 12 00:18:27 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Tue, 11 Sep 2012 22:18:27 -0600
Subject: [PATCH V3 3/5] ARM: bcm2708: add system timer
In-Reply-To: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347423509-30647-3-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The System Timer peripheral provides four 32-bit timer channels and a
single 64-bit free running counter. Each channel has an output compare
register, which is compared against the 32 least significant bits of the
free running counter values, and generates an interrupt.

Timer 3 is used as the Linux timer.

The BCM2708 also contains an SP804-based timer module. However, it
apparently has significant differences from the standard SP804 IP block,
and Broadcom's documentation recommends using the system timer instead.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Moved struct sys_timer bcm2708_timer into time.c to encapsulate it more.
* Added DT binding docs.
* Moved to drivers/clocksource/. This looks like the desired location for
  such code now.
* Simplified bcm2708_time_init() to find one matching node and operate on
  it, rather than looping over all matching nodes. This seems more
  consistent with other clocksource code.
* Renamed struct bcm2708_timer.index to match_mask to better represent its
  purpose.
* s/printk(PR_INFO/pr_info(/

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
v3: New patch.

TODO: Should of_address_to_resource(), ioremap(), request_mem_region()
in bcm2708_time_init() be collapsed into of_iomap(). This wouldn't request
the region, but a quick grep implies that's quite common with DT.
---
 .../arm/bcm2708/broadcom,bcm2708-system-timer.txt  |   22 +++
 arch/arm/boot/dts/bcm2835.dtsi                     |    7 +
 arch/arm/mach-bcm2708/bcm2708.c                    |   10 +-
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/bcm2708_timer.c                |  170 ++++++++++++++++++++
 include/linux/bcm2708_timer.h                      |   22 +++
 6 files changed, 223 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-system-timer.txt
 create mode 100644 drivers/clocksource/bcm2708_timer.c
 create mode 100644 include/linux/bcm2708_timer.h

diff --git a/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-system-timer.txt b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-system-timer.txt
new file mode 100644
index 0000000..840e18b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-system-timer.txt
@@ -0,0 +1,22 @@
+BCM2708 System Timer
+
+The System Timer peripheral provides four 32-bit timer channels and a
+single 64-bit free running counter. Each channel has an output compare
+register, which is compared against the 32 least significant bits of the
+free running counter values, and generates an interrupt.
+
+Required properties:
+
+- compatible : should be "broadcom,bcm2708-system-timer.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 4 interrupt sinks; one per timer channel.
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+	compatible = "broadcom,bcm2835-system-timer", "broadcom,bcm2708-system-timer";
+	reg = <0x20003000 0x1000>;
+	interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+	clock-frequency = <1000000>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 00eaf2b..3e8ea51 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -9,6 +9,13 @@
 		bootargs = "earlyprintk";
 	};
 
+	timer {
+		compatible = "broadcom,bcm2835-system-timer", "broadcom,bcm2708-system-timer";
+		reg = <0x20003000 0x1000>;
+		interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+		clock-frequency = <1000000>;
+	};
+
 	intc: interrupt-controller {
 		compatible = "broadcom,bcm2708-armctrl-ic";
 		reg = <0x2000b200 0x200>;
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
index ad6b7f8..8ee11d9 100644
--- a/arch/arm/mach-bcm2708/bcm2708.c
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -14,10 +14,10 @@
 
 #include <linux/init.h>
 #include <linux/of_platform.h>
+#include <linux/bcm2708_timer.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/time.h>
 #include <asm/exception.h>
 
 #include <mach/bcm2708_soc.h>
@@ -48,14 +48,6 @@ void __init bcm2708_init(void)
 	}
 }
 
-static void __init bcm2708_timer_init(void)
-{
-}
-
-struct sys_timer bcm2708_timer = {
-	.init = bcm2708_timer_init
-};
-
 static const char * const bcm2708_compat[] = {
 	"broadcom,bcm2708",
 	NULL
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 6591990..342b72e 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_DW_APB_TIMER_OF)	+= dw_apb_timer_of.o
 obj-$(CONFIG_CLKSRC_DBX500_PRCMU)	+= clksrc-dbx500-prcmu.o
 obj-$(CONFIG_ARMADA_370_XP_TIMER)	+= time-armada-370-xp.o
 obj-$(CONFIG_CLKSRC_ARM_GENERIC)	+= arm_generic.o
+obj-$(CONFIG_ARCH_BCM2708)	+= bcm2708_timer.o
diff --git a/drivers/clocksource/bcm2708_timer.c b/drivers/clocksource/bcm2708_timer.c
new file mode 100644
index 0000000..bc41381
--- /dev/null
+++ b/drivers/clocksource/bcm2708_timer.c
@@ -0,0 +1,170 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/bcm2708_timer.h>
+#include <linux/bitops.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/interrupt.h>
+#include <linux/irqreturn.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+
+#include <asm/sched_clock.h>
+#include <asm/irq.h>
+
+#define REG_CONTROL	0x00
+#define REG_COUNTER_LO	0x04
+#define REG_COUNTER_HI	0x08
+#define REG_COMPARE(n)	(0x0c + (n) * 4)
+#define MAX_TIMER	3
+#define DEFAULT_TIMER	3
+
+struct bcm2708_timer {
+	void __iomem *control;
+	void __iomem *compare;
+	int match_mask;
+	struct clock_event_device evt;
+	struct irqaction act;
+};
+
+static void __iomem *system_clock __read_mostly;
+
+static u32 notrace bcm2708_sched_read(void)
+{
+	return readl_relaxed(system_clock);
+}
+
+static void bcm2708_time_set_mode(enum clock_event_mode mode,
+	struct clock_event_device *evt_dev)
+{
+	switch (mode) {
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
+		break;
+	default:
+		WARN(1, "%s: unhandled event mode %d\n", __func__, mode);
+		break;
+	}
+}
+
+static int bcm2708_time_set_next_event(unsigned long event,
+	struct clock_event_device *evt_dev)
+{
+	struct bcm2708_timer *timer = container_of(evt_dev,
+		struct bcm2708_timer, evt);
+	writel_relaxed(readl_relaxed(system_clock) + event,
+		timer->compare);
+	return 0;
+}
+
+static irqreturn_t bcm2708_time_interrupt(int irq, void *dev_id)
+{
+	struct bcm2708_timer *timer = dev_id;
+	void (*event_handler)(struct clock_event_device *);
+	if (readl_relaxed(timer->control) & timer->match_mask) {
+		writel_relaxed(timer->match_mask, timer->control);
+
+		event_handler = ACCESS_ONCE(timer->evt.event_handler);
+		if (event_handler)
+			event_handler(&timer->evt);
+		return IRQ_HANDLED;
+	} else {
+		return IRQ_NONE;
+	}
+}
+
+static struct of_device_id bcm2708_time_match[] __initconst = {
+	{ .compatible = "broadcom,bcm2708-system-timer" },
+	{}
+};
+
+static void __init bcm2708_time_init(void)
+{
+	struct device_node *node;
+	struct resource res;
+	void __iomem *base;
+	u32 freq;
+	int irq;
+	struct bcm2708_timer *timer;
+
+	node = of_find_matching_node(NULL, bcm2708_time_match);
+	if (!node)
+		panic("No bcm2708 timer node");
+
+	if (of_address_to_resource(node, 0, &res))
+		panic("Can't parse address");
+
+	if (!request_mem_region(res.start, resource_size(&res),
+			node->full_name))
+		panic("Can't request memory region");
+
+	base = ioremap(res.start, resource_size(&res));
+	if (!base)
+		panic("Can't remap registers");
+
+	if (of_property_read_u32(node, "clock-frequency", &freq))
+		panic("Can't read clock-frequency");
+
+	system_clock = base + REG_COUNTER_LO;
+	setup_sched_clock(bcm2708_sched_read, 32, freq);
+
+	clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
+		freq, 300, 32, clocksource_mmio_readl_up);
+
+	irq = irq_of_parse_and_map(node, DEFAULT_TIMER);
+	if (irq <= 0)
+		panic("Can't parse IRQ");
+
+	timer = kzalloc(sizeof(*timer), GFP_KERNEL);
+	if (!timer)
+		panic("Can't allocate timer struct\n");
+
+	timer->control = base + REG_CONTROL;
+	timer->compare = base + REG_COMPARE(DEFAULT_TIMER);
+	timer->match_mask = BIT(DEFAULT_TIMER);
+	timer->evt.name = node->name;
+	timer->evt.rating = 300;
+	timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
+	timer->evt.set_mode = bcm2708_time_set_mode;
+	timer->evt.set_next_event = bcm2708_time_set_next_event;
+	timer->evt.cpumask = cpumask_of(0);
+	timer->act.name = node->name;
+	timer->act.flags = IRQF_TIMER | IRQF_SHARED;
+	timer->act.dev_id = timer;
+	timer->act.handler = bcm2708_time_interrupt;
+
+	if (setup_irq(irq, &timer->act))
+		panic("Can't set up timer IRQ\n");
+
+	clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
+
+	pr_info("bcm2708: system timer at MMIO %#lx (irq = %d)\n",
+		(unsigned long)res.start, irq);
+}
+
+struct sys_timer bcm2708_timer = {
+	.init = bcm2708_time_init,
+};
diff --git a/include/linux/bcm2708_timer.h b/include/linux/bcm2708_timer.h
new file mode 100644
index 0000000..1a433c1
--- /dev/null
+++ b/include/linux/bcm2708_timer.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BCM2708_TIMER_H
+#define __BCM2708_TIMER_H
+
+#include <asm/mach/time.h>
+
+extern struct sys_timer bcm2708_timer;
+
+#endif
-- 
1.7.9.5



From swarren at wwwdotorg.org  Wed Sep 12 00:18:25 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Tue, 11 Sep 2012 22:18:25 -0600
Subject: [PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and
 Raspberry Pi
Message-ID: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
series which contains the BCM2835 amongst other variants. This patch
adds very basic support for this series of SoCs, under the BCM2708 name.

http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd

Note that the documentation in the latter .pdf assumes the MMU setup
that's used on the "VideoCore" companion processor, and does not document
physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
addresses.

The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
minimal device tree for this board; enough to see some very early kernel
boot messages through earlyprintk. However, this patch does not yet
provide a useful booting system.

http://www.raspberrypi.org/.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split from 3-4 months ago, and significantly stripped down and
modified since.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
This version is enough to get to "Kernel panic - not syncing: No init found."
I haven't tested yet, but I expect that using an initrd should work.

v3:
* Added DT binding documentation for the SoC itself.
* Changed patch subject from "support" to "infra-structure", and added
  to the commit description, to indicate that the patch isn't adding
  complete support for the SoC/board.
* Added all S-o-b tags from downstream, now that I have permission to
  fix them up to be valid.
* Changed patch author to Simon Arlott, now I have permission to change
  his email address to something valid.
* Limited my (c) additions to files I created; the other changes turnd
  out to be trivial.
v2:
* Rename *_BASE to *_PHYS to match Simon's rpi-split branch.
* Remove #define UART_BAUD since it isn't used.
* Don't select WATCHDOG from ARCH_BCM2708
* Remove 8250 and PL010 serial ports from bcm2708_defconfig
* Remove <mach/hardware.h>
* Rename common.c back to bcm2708.c; matches downstream and is
  preferred naming style.
---
 Documentation/devicetree/bindings/arm/bcm2708.txt |   15 ++++
 arch/arm/Kconfig                                  |   18 ++++
 arch/arm/Makefile                                 |    1 +
 arch/arm/boot/dts/bcm2835-rpi-b.dts               |   12 +++
 arch/arm/boot/dts/bcm2835.dtsi                    |   10 +++
 arch/arm/configs/bcm2708_defconfig                |   93 +++++++++++++++++++++
 arch/arm/mach-bcm2708/Makefile                    |    1 +
 arch/arm/mach-bcm2708/Makefile.boot               |    5 ++
 arch/arm/mach-bcm2708/bcm2708.c                   |   77 +++++++++++++++++
 arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h  |   29 +++++++
 arch/arm/mach-bcm2708/include/mach/debug-macro.S  |   21 +++++
 arch/arm/mach-bcm2708/include/mach/timex.h        |   26 ++++++
 arch/arm/mach-bcm2708/include/mach/uncompress.h   |   45 ++++++++++
 13 files changed, 353 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2708.txt
 create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2835.dtsi
 create mode 100644 arch/arm/configs/bcm2708_defconfig
 create mode 100644 arch/arm/mach-bcm2708/Makefile
 create mode 100644 arch/arm/mach-bcm2708/Makefile.boot
 create mode 100644 arch/arm/mach-bcm2708/bcm2708.c
 create mode 100644 arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-bcm2708/include/mach/timex.h
 create mode 100644 arch/arm/mach-bcm2708/include/mach/uncompress.h

diff --git a/Documentation/devicetree/bindings/arm/bcm2708.txt b/Documentation/devicetree/bindings/arm/bcm2708.txt
new file mode 100644
index 0000000..49eec61
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm2708.txt
@@ -0,0 +1,15 @@
+Broadcom BCM2708 device tree bindings
+-------------------------------------------
+
+Boards with the BCM2708 SoC, or another SoC in the BCM2708 family, shall have
+the following properties:
+
+Required root node property:
+
+compatible = "broadcom,bcm2708";
+
+Boards with BCM2835 SoC shall *additionally* have the following properties:
+
+Required root node property:
+
+compatible = "broadcom,bcm2835";
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d0021fe..4dcd0cd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -349,6 +349,24 @@ config ARCH_AT91
 	  This enables support for systems based on Atmel
 	  AT91RM9200 and AT91SAM9* processors.
 
+config ARCH_BCM2708
+	bool "Broadcom BCM2708 family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_ERRATA_411920
+	select ARM_TIMER_SP804
+	select CLKDEV_LOOKUP
+	select COMMON_CLK
+	select CPU_V6
+	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  This enables support for the Broadcom BCM2708 SoC series. The
+	  BCM2835 is one such SoC in this series. The Raspberry Pi uses
+	  the BCM2835.
+
 config ARCH_BCMRING
 	bool "Broadcom BCMRING"
 	depends on MMU
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a812d12..3c4f0b3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -136,6 +136,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)		:= at91
+machine-$(CONFIG_ARCH_BCM2708)		:= bcm2708
 machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)		:= cns3xxx
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
new file mode 100644
index 0000000..7e43197
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/memreserve/ 0x0c000000 0x04000000;
+/include/ "bcm2835.dtsi"
+
+/ {
+	model = "Raspberry Pi Model B";
+	compatible = "raspberrypi,model-b", "broadcom,bcm2835", "broadcom,bcm2708";
+
+	memory {
+		reg = <0 0x10000000>;
+	};
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
new file mode 100644
index 0000000..9039482
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -0,0 +1,10 @@
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "broadcom,bcm2835", "broadcom,bcm2708";
+	model = "BCM2835";
+
+	chosen {
+		bootargs = "earlyprintk";
+	};
+};
diff --git a/arch/arm/configs/bcm2708_defconfig b/arch/arm/configs/bcm2708_defconfig
new file mode 100644
index 0000000..6f741e9
--- /dev/null
+++ b/arch/arm/configs/bcm2708_defconfig
@@ -0,0 +1,93 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_BLOCK is not set
+CONFIG_ARCH_BCM2708=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_COMPACTION=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_CLEANCACHE=y
+CONFIG_SECCOMP=y
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_PRINTK_TIME=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_BOOT_PRINTK_DELAY=y
+CONFIG_SCHED_TRACER=y
+CONFIG_STACK_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_KGDB=y
+CONFIG_KGDB_KDB=y
+CONFIG_TEST_KSTRTOX=y
+CONFIG_STRICT_DEVMEM=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile
new file mode 100644
index 0000000..c382763
--- /dev/null
+++ b/arch/arm/mach-bcm2708/Makefile
@@ -0,0 +1 @@
+obj-y += bcm2708.o
diff --git a/arch/arm/mach-bcm2708/Makefile.boot b/arch/arm/mach-bcm2708/Makefile.boot
new file mode 100644
index 0000000..0831fd1
--- /dev/null
+++ b/arch/arm/mach-bcm2708/Makefile.boot
@@ -0,0 +1,5 @@
+   zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
+
+dtb-y += bcm2835-rpi-b.dtb
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
new file mode 100644
index 0000000..ae6df4f
--- /dev/null
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/exception.h>
+
+#include <mach/bcm2708_soc.h>
+
+static struct map_desc io_map __initdata = {
+	.virtual = BCM2708_PERIPH_VIRT,
+	.pfn = __phys_to_pfn(BCM2708_PERIPH_PHYS),
+	.length = BCM2708_PERIPH_SIZE,
+	.type = MT_DEVICE
+};
+
+void __init bcm2708_map_io(void)
+{
+	iotable_init(&io_map, 1);
+}
+
+void __init bcm2708_init_irq(void)
+{
+}
+
+asmlinkage void __exception_irq_entry bcm2708_handle_irq(struct pt_regs *regs)
+{
+}
+
+void __init bcm2708_init(void)
+{
+	int ret;
+
+	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
+				   NULL);
+	if (ret) {
+		pr_err("of_platform_populate failed: %d\n", ret);
+		BUG();
+	}
+}
+
+static void __init bcm2708_timer_init(void)
+{
+}
+
+struct sys_timer bcm2708_timer = {
+	.init = bcm2708_timer_init
+};
+
+static const char * const bcm2708_compat[] = {
+	"broadcom,bcm2708",
+	NULL
+};
+
+DT_MACHINE_START(BCM2708, "BCM2708")
+	.map_io = bcm2708_map_io,
+	.init_irq = bcm2708_init_irq,
+	.handle_irq = bcm2708_handle_irq,
+	.init_machine = bcm2708_init,
+	.timer = &bcm2708_timer,
+	.dt_compat = bcm2708_compat
+MACHINE_END
diff --git a/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h b/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
new file mode 100644
index 0000000..3549699
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/bcm2708_soc.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_BCM2708_BCM2708_SOC_H__
+#define __MACH_BCM2708_BCM2708_SOC_H__
+
+#include <asm/sizes.h>
+
+#define BCM2708_PERIPH_PHYS	0x20000000
+#define BCM2708_PERIPH_VIRT	0xf0000000
+#define BCM2708_PERIPH_SIZE	SZ_16M
+#define BCM2708_DEBUG_PHYS	0x20201000
+#define BCM2708_DEBUG_VIRT	0xf0201000
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/debug-macro.S b/arch/arm/mach-bcm2708/include/mach/debug-macro.S
new file mode 100644
index 0000000..132ee0a
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/debug-macro.S
@@ -0,0 +1,21 @@
+/*
+ * Debugging macro include header
+ *
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <mach/bcm2708_soc.h>
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rp, =BCM2708_DEBUG_PHYS
+	ldr	\rv, =BCM2708_DEBUG_VIRT
+	.endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-bcm2708/include/mach/timex.h b/arch/arm/mach-bcm2708/include/mach/timex.h
new file mode 100644
index 0000000..ca67219
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/timex.h
@@ -0,0 +1,26 @@
+/*
+ *  BCM2708 system clock frequency
+ *
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+#define CLOCK_TICK_RATE		(1000000)
+
+#endif
diff --git a/arch/arm/mach-bcm2708/include/mach/uncompress.h b/arch/arm/mach-bcm2708/include/mach/uncompress.h
new file mode 100644
index 0000000..df2bf2f
--- /dev/null
+++ b/arch/arm/mach-bcm2708/include/mach/uncompress.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/amba/serial.h>
+#include <mach/bcm2708_soc.h>
+
+#define UART0_BASE BCM2708_DEBUG_PHYS
+
+#define BCM2708_UART_DR IOMEM(UART0_BASE + UART01x_DR)
+#define BCM2708_UART_FR IOMEM(UART0_BASE + UART01x_FR)
+#define BCM2708_UART_CR IOMEM(UART0_BASE + UART011_CR)
+
+static inline void putc(int c)
+{
+	while (__raw_readl(BCM2708_UART_FR) & UART01x_FR_TXFF)
+		barrier();
+
+	__raw_writel(c, BCM2708_UART_DR);
+}
+
+static inline void flush(void)
+{
+	int fr;
+
+	do {
+		fr = __raw_readl(BCM2708_UART_FR);
+		barrier();
+	} while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE);
+}
+
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
-- 
1.7.9.5



From swarren at wwwdotorg.org  Wed Sep 12 00:18:26 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Tue, 11 Sep 2012 22:18:26 -0600
Subject: [PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver
In-Reply-To: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347423509-30647-2-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The BCM2708 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Added devicetree documentation, and hence removed list of IRQs from
  bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
  the size of the hwirq space, and pass the total size of the hwirq space
  to irq_domain_add_linear(), rather than just the number of valid hwirqs;
  the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
  rather than nesting it inside a /axi node. Hence, changed the reg value
  since /axi had a ranges property. This seems simpler to me, but I'm not
  sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
  removing the need to patch include/linux/irqdomain.h or
  kernel/irq/irqdomain.c.
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
  controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
--
v3: New patch.

TODO: Should of_address_to_resource(), ioremap(), request_mem_region()
in armctrl_of_init() be collapsed into of_iomap(). This wouldn't request
the region, but a quick grep implies that's quite common with DT.
---
 .../arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt    |  110 +++++++++
 arch/arm/boot/dts/bcm2835.dtsi                     |    8 +
 arch/arm/mach-bcm2708/Makefile                     |    1 +
 arch/arm/mach-bcm2708/bcm2708.c                    |   12 +-
 arch/arm/mach-bcm2708/irq.c                        |  234 ++++++++++++++++++++
 arch/arm/mach-bcm2708/irq.h                        |   27 +++
 6 files changed, 383 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt
 create mode 100644 arch/arm/mach-bcm2708/irq.c
 create mode 100644 arch/arm/mach-bcm2708/irq.h

diff --git a/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt
new file mode 100644
index 0000000..d7f7887
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt
@@ -0,0 +1,110 @@
+BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
+
+The BCM2708 contains a custom top-level interrupt controller, which supports
+72 interrupt sources using a 2-level register scheme. The interrupt
+controller, or the HW block containing it, is referred to occasionally
+as "armctrl" in the SoC documentation, hence naming of this binding.
+
+Required properties:
+
+- compatible : should be "broadcom,bcm2708-armctrl-ic.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 2.
+
+  The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic
+  pending" register, or 1/2 respectively for interrupts in the "IRQ pending
+  1/2" register.
+
+  The 2nd cell contains the interrupt number within the bank. Valid values
+  are 0..7 for bank 0, and 0..31 for bank 1.
+
+The interrupt sources are as follows, for the BCM2835 derivative SoC at least:
+
+Bank 0:
+0: ARM_TIMER
+1: ARM_MAILBOX
+2: ARM_DOORBELL_0
+3: ARM_DOORBELL_1
+4: VPU0_HALTED
+5: VPU1_HALTED
+6: ILLEGAL_TYPE0
+7: ILLEGAL_TYPE1
+
+Bank 1:
+0: TIMER0
+1: TIMER1
+2: TIMER2
+3: TIMER3
+4: CODEC0
+5: CODEC1
+6: CODEC2
+7: VC_JPEG
+8: ISP
+9: VC_USB
+10: VC_3D
+11: TRANSPOSER
+12: MULTICORESYNC0
+13: MULTICORESYNC1
+14: MULTICORESYNC2
+15: MULTICORESYNC3
+16: DMA0
+17: DMA1
+18: VC_DMA2
+19: VC_DMA3
+20: DMA4
+21: DMA5
+22: DMA6
+23: DMA7
+24: DMA8
+25: DMA9
+26: DMA10
+27: DMA11
+28: DMA12
+29: AUX
+30: ARM
+31: VPUDMA
+
+Bank 2:
+0: HOSTPORT
+1: VIDEOSCALER
+2: CCP2TX
+3: SDC
+4: DSI0
+5: AVE
+6: CAM0
+7: CAM1
+8: HDMI0
+9: HDMI1
+10: PIXELVALVE1
+11: I2CSPISLV
+12: DSI1
+13: PWA0
+14: PWA1
+15: CPR
+16: SMI
+17: GPIO0
+18: GPIO1
+19: GPIO2
+20: GPIO3
+21: VC_I2C
+22: VC_SPI
+23: VC_I2SPCM
+24: VC_SDIO
+25: VC_UART
+26: SLIMBUS
+27: VEC
+28: CPG
+29: RNG
+30: VC_ARASANSDIO
+31: AVSPMON
+
+Example:
+
+intc: interrupt-controller {
+	compatible = "broadcom,bcm2708-armctrl-ic";
+	reg = <0x2000b200 0x200>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 9039482..00eaf2b 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -3,8 +3,16 @@
 / {
 	compatible = "broadcom,bcm2835", "broadcom,bcm2708";
 	model = "BCM2835";
+	interrupt-parent = <&intc>;
 
 	chosen {
 		bootargs = "earlyprintk";
 	};
+
+	intc: interrupt-controller {
+		compatible = "broadcom,bcm2708-armctrl-ic";
+		reg = <0x2000b200 0x200>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
 };
diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile
index c382763..597f811 100644
--- a/arch/arm/mach-bcm2708/Makefile
+++ b/arch/arm/mach-bcm2708/Makefile
@@ -1 +1,2 @@
 obj-y += bcm2708.o
+obj-y += irq.o
diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
index ae6df4f..ad6b7f8 100644
--- a/arch/arm/mach-bcm2708/bcm2708.c
+++ b/arch/arm/mach-bcm2708/bcm2708.c
@@ -22,6 +22,8 @@
 
 #include <mach/bcm2708_soc.h>
 
+#include "irq.h"
+
 static struct map_desc io_map __initdata = {
 	.virtual = BCM2708_PERIPH_VIRT,
 	.pfn = __phys_to_pfn(BCM2708_PERIPH_PHYS),
@@ -34,14 +36,6 @@ void __init bcm2708_map_io(void)
 	iotable_init(&io_map, 1);
 }
 
-void __init bcm2708_init_irq(void)
-{
-}
-
-asmlinkage void __exception_irq_entry bcm2708_handle_irq(struct pt_regs *regs)
-{
-}
-
 void __init bcm2708_init(void)
 {
 	int ret;
@@ -70,7 +64,7 @@ static const char * const bcm2708_compat[] = {
 DT_MACHINE_START(BCM2708, "BCM2708")
 	.map_io = bcm2708_map_io,
 	.init_irq = bcm2708_init_irq,
-	.handle_irq = bcm2708_handle_irq,
+	.handle_irq = bcm2708_armctrl_handle_irq,
 	.init_machine = bcm2708_init,
 	.timer = &bcm2708_timer,
 	.dt_compat = bcm2708_compat
diff --git a/arch/arm/mach-bcm2708/irq.c b/arch/arm/mach-bcm2708/irq.c
new file mode 100644
index 0000000..81dba4e
--- /dev/null
+++ b/arch/arm/mach-bcm2708/irq.c
@@ -0,0 +1,234 @@
+/*
+ *  Copyright 2010 Broadcom
+ *  Copyright 2012 Simon Arlott, Chris Boot, Stephen Warren
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Quirk 1: Shortcut interrupts don't set the bank 1/2 register pending bits
+ *
+ * If an interrupt fires on bank 1 that isn't in the shortcuts list, bit 8
+ * on bank 0 is set to signify that an interrupt in bank 1 has fired, and
+ * to look in the bank 1 status register for more information.
+ *
+ * If an interrupt fires on bank 1 that _is_ in the shortcuts list, its
+ * shortcut bit in bank 0 is set as well as its interrupt bit in the bank 1
+ * status register, but bank 0 bit 8 is _not_ set.
+ *
+ * Quirk 2: You can't mask the register 1/2 pending interrupts
+ *
+ * In a proper cascaded interrupt controller, the interrupt lines with
+ * cascaded interrupt controllers on them are just normal interrupt lines.
+ * You can mask the interrupts and get on with things. With this controller
+ * you can't do that.
+ *
+ * Quirk 3: The shortcut interrupts can't be (un)masked in bank 0
+ *
+ * Those interrupts that have shortcuts can only be masked/unmasked in
+ * their respective banks' enable/disable registers. Doing so in the bank 0
+ * enable/disable registers has no effect.
+ *
+ * The FIQ control register:
+ *  Bits 0-6: IRQ (index in order of interrupts from banks 1, 2, then 0)
+ *  Bit    7: Enable FIQ generation
+ *  Bits  8+: Unused
+ *
+ * An interrupt must be disabled before configuring it for FIQ generation
+ * otherwise both handlers will fire at the same time!
+ */
+
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <asm/exception.h>
+
+#include "irq.h"
+
+/* Put the bank and irq (32 bits) into the hwirq */
+#define MAKE_HWIRQ(b, n)	((b << 5) | (n))
+#define HWIRQ_BANK(i)		(i >> 5)
+#define HWIRQ_BIT(i)		BIT(i & 0x1f)
+
+#define NR_IRQS_BANK0		8
+#define BANK0_HWIRQ_MASK	0xff
+/* Shortcuts can't be disabled so any unknown new ones need to be masked */
+#define SHORTCUT1_MASK		0x00007c00
+#define SHORTCUT2_MASK		0x001f8000
+#define SHORTCUT_SHIFT		10
+#define BANK1_HWIRQ		BIT(8)
+#define BANK2_HWIRQ		BIT(9)
+#define BANK0_VALID_MASK	(BANK0_HWIRQ_MASK | BANK1_HWIRQ | BANK2_HWIRQ \
+					| SHORTCUT1_MASK | SHORTCUT2_MASK)
+
+#define REG_FIQ_CONTROL		0x0c
+
+#define NR_BANKS		3
+#define IRQS_PER_BANK		32
+
+static int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
+static int reg_enable[] __initconst = { 0x18, 0x10, 0x14 };
+static int reg_disable[] __initconst = { 0x24, 0x1c, 0x20 };
+static int bank_irqs[] __initconst = { 8, 32, 32 };
+
+static const int shortcuts[] = {
+	7, 9, 10, 18, 19,		/* Bank 1 */
+	21, 22, 23, 24, 25, 30		/* Bank 2 */
+};
+
+struct armctrl_ic {
+	void __iomem *base;
+	void __iomem *pending[NR_BANKS];
+	void __iomem *enable[NR_BANKS];
+	void __iomem *disable[NR_BANKS];
+	struct irq_domain *domain;
+};
+
+static struct armctrl_ic intc __read_mostly;
+
+static void armctrl_mask_irq(struct irq_data *d)
+{
+	writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]);
+}
+
+static void armctrl_unmask_irq(struct irq_data *d)
+{
+	writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]);
+}
+
+static struct irq_chip armctrl_chip = {
+	.name = "ARMCTRL-level",
+	.irq_mask = armctrl_mask_irq,
+	.irq_unmask = armctrl_unmask_irq
+};
+
+static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr,
+	const u32 *intspec, unsigned int intsize,
+	unsigned long *out_hwirq, unsigned int *out_type)
+{
+	if (WARN_ON(intsize != 2))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[0] >= NR_BANKS))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[1] >= IRQS_PER_BANK))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[0] == 0 && intspec[1] >= NR_IRQS_BANK0))
+		return -EINVAL;
+
+	*out_hwirq = MAKE_HWIRQ(intspec[0], intspec[1]);
+	*out_type = IRQ_TYPE_NONE;
+	return 0;
+}
+
+static struct irq_domain_ops armctrl_ops = {
+	.xlate = armctrl_xlate
+};
+
+static int __init armctrl_of_init(struct device_node *node,
+	struct device_node *parent)
+{
+	struct resource res;
+	void __iomem *base;
+	int ret, irq, b, i;
+
+	ret = of_address_to_resource(node, 0, &res);
+	if (ret)
+		panic("%s: unable to find IC registers\n",
+			node->full_name);
+
+	base = ioremap(res.start, resource_size(&res));
+	if (!base)
+		panic("%s: unable to map IC registers\n",
+			node->full_name);
+
+	if (!request_mem_region(res.start, resource_size(&res),
+			node->full_name))
+		panic("%s: unable to request resources for IC registers\n",
+			node->full_name);
+
+	intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0),
+			&armctrl_ops, NULL);
+	if (!intc.domain)
+		panic("%s: unable to create IRQ domain\n", node->full_name);
+
+	for (b = 0; b < NR_BANKS; b++) {
+		intc.pending[b] = base + reg_pending[b];
+		intc.enable[b] = base + reg_enable[b];
+		intc.disable[b] = base + reg_disable[b];
+
+		for (i = 0; i < bank_irqs[b]; i++) {
+			irq = irq_create_mapping(intc.domain, MAKE_HWIRQ(b, i));
+			BUG_ON(irq <= 0);
+			irq_set_chip_and_handler(irq, &armctrl_chip,
+				handle_level_irq);
+			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+		}
+	}
+	return 0;
+}
+
+static struct of_device_id irq_of_match[] __initconst = {
+	{ .compatible = "broadcom,bcm2708-armctrl-ic", .data = armctrl_of_init }
+};
+
+void __init bcm2708_init_irq(void)
+{
+	of_irq_init(irq_of_match);
+}
+
+/*
+ * Handle each interrupt across the entire interrupt controller.  This reads the
+ * status register before handling each interrupt, which is necessary given that
+ * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
+ */
+
+static void armctrl_handle_bank(int bank, struct pt_regs *regs)
+{
+	u32 stat, irq;
+
+	while ((stat = readl_relaxed(intc.pending[bank]))) {
+		irq = MAKE_HWIRQ(bank, ffs(stat) - 1);
+		handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+	}
+}
+
+static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,
+	u32 stat)
+{
+	u32 irq = MAKE_HWIRQ(bank, shortcuts[ffs(stat >> SHORTCUT_SHIFT) - 1]);
+	handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+}
+
+asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
+	struct pt_regs *regs)
+{
+	u32 stat, irq;
+
+	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
+		if (stat & BANK0_HWIRQ_MASK) {
+			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
+			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+		} else if (stat & SHORTCUT1_MASK) {
+			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
+		} else if (stat & SHORTCUT2_MASK) {
+			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
+		} else if (stat & BANK1_HWIRQ) {
+			armctrl_handle_bank(1, regs);
+		} else if (stat & BANK2_HWIRQ) {
+			armctrl_handle_bank(2, regs);
+		} else {
+			BUG();
+		}
+	}
+}
diff --git a/arch/arm/mach-bcm2708/irq.h b/arch/arm/mach-bcm2708/irq.h
new file mode 100644
index 0000000..2cf073b
--- /dev/null
+++ b/arch/arm/mach-bcm2708/irq.h
@@ -0,0 +1,27 @@
+/*
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __BCM2708_IRQ_H
+#define __BCM2708_IRQ_H
+
+extern void bcm2708_init_irq(void);
+
+extern asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
+	struct pt_regs *regs);
+
+#endif
-- 
1.7.9.5



From arnd at arndb.de  Wed Sep 12 05:01:26 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Wed, 12 Sep 2012 09:01:26 +0000
Subject: [PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and
 Raspberry Pi
In-Reply-To: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209120901.26990.arnd@arndb.de>

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> The BCM2708 is an ARM SoC from Broadcom. It is the primary SoC in a
> series which contains the BCM2835 amongst other variants. This patch
> adds very basic support for this series of SoCs, under the BCM2708 name.
> 
> http://www.broadcom.com/products/BCM2835
> http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd
> 
> Note that the documentation in the latter .pdf assumes the MMU setup
> that's used on the "VideoCore" companion processor, and does not document
> physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
> addresses.
> 
> The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
> minimal device tree for this board; enough to see some very early kernel
> boot messages through earlyprintk. However, this patch does not yet
> provide a useful booting system.
> 
> http://www.raspberrypi.org/.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split from 3-4 months ago, and significantly stripped down and
> modified since.
> 
> Signed-off-by: Chris Boot <bootc at bootc.net>
> Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix at gmail.com>
> Signed-off-by: Dom Cobley <dc4 at broadcom.com>
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>

Acked-by: Arnd Bergmann <arnd at arndb.de>



From arnd at arndb.de  Wed Sep 12 06:37:43 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Wed, 12 Sep 2012 10:37:43 +0000
Subject: [PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver
In-Reply-To: <1347423509-30647-2-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <1347423509-30647-2-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209121037.43897.arnd@arndb.de>

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> The BCM2708 contains a custom interrupt controller, which supports 72
> interrupt sources using a 2-level register scheme. The interrupt
> controller, or the HW block containing it, is referred to occasionally
> as "armctrl" in the SoC documentation, hence the symbol naming in the
> code.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Added devicetree documentation, and hence removed list of IRQs from
>   bcm2835.dtsi.
> * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
>   the size of the hwirq space, and pass the total size of the hwirq space
>   to irq_domain_add_linear(), rather than just the number of valid hwirqs;
>   the two are different due to the hwirq space being sparse.

If the IRQ space is very sparse, isn't it better to use a tree domain
rather than a linear one?

> * Added the interrupt controller DT node to the top-level of the DT,
>   rather than nesting it inside a /axi node. Hence, changed the reg value
>   since /axi had a ranges property. This seems simpler to me, but I'm not
>   sure if everyone will like this change or not.

The layout should follow what the hardware looks like. If the interrupt
controller is connected through axi, then I'd suggest describing it there
unless there is a strong reason not to. The interrupt-parent property
of the root node can easily point anywhere.

> TODO: Should of_address_to_resource(), ioremap(), request_mem_region()
> in armctrl_of_init() be collapsed into of_iomap(). This wouldn't request
> the region, but a quick grep implies that's quite common with DT.

Yes, that sounds reasonable.

> diff --git a/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt
> new file mode 100644
> index 0000000..d7f7887
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/bcm2708/broadcom,bcm2708-armctrl-ic.txt

The bindings are normally grouped by subsystem, not by manufacturer or soc,
because a lot of components end up getting reused by other people. For
some reason, we have put a lot of interrupt controller bindings into the
arm subdirectory, so you can keep doing this, but I would not create a hierarchy
below that.

I think it would be even better if we could put them all into
bindings/interrupt-controller or similar.

> @@ -0,0 +1,110 @@
> +BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
> +
> +The BCM2708 contains a custom top-level interrupt controller, which supports
> +72 interrupt sources using a 2-level register scheme. The interrupt
> +controller, or the HW block containing it, is referred to occasionally
> +as "armctrl" in the SoC documentation, hence naming of this binding.

Do we actually know that BCM2708 has the same one, or could it be present
just on bcm2835? It seem hard to find any information about bcm2708,
so I don't feel too good about using that name in bindings.


> diff --git a/arch/arm/mach-bcm2708/irq.c b/arch/arm/mach-bcm2708/irq.c
> new file mode 100644
> index 0000000..81dba4e
> --- /dev/null
> +++ b/arch/arm/mach-bcm2708/irq.c

We're starting to put interrupt controller drivers into drivers/irqchip
in v3.7, so maybe you can put this one there too. We will get a trivial
merge conflict with the Makefile, but that's ok IMHO.

> +asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
> +	struct pt_regs *regs)
> +{
> +	u32 stat, irq;
> +
> +	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
> +		if (stat & BANK0_HWIRQ_MASK) {
> +			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
> +			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
> +		} else if (stat & SHORTCUT1_MASK) {
> +			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
> +		} else if (stat & SHORTCUT2_MASK) {
> +			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
> +		} else if (stat & BANK1_HWIRQ) {
> +			armctrl_handle_bank(1, regs);
> +		} else if (stat & BANK2_HWIRQ) {
> +			armctrl_handle_bank(2, regs);
> +		} else {
> +			BUG();
> +		}
> +	}
> +}


I'm not sure if readl_relaxed() is appropriate here, or if you need readl().
If you have an MSI type interrupt signaling the completion of a DMA, you
need to ensure ordering between the data transfer and the interrupt
notification.

	Arnd


From arnd at arndb.de  Wed Sep 12 06:40:32 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Wed, 12 Sep 2012 10:40:32 +0000
Subject: [PATCH V3 3/5] ARM: bcm2708: add system timer
In-Reply-To: <1347423509-30647-3-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <1347423509-30647-3-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209121040.32600.arnd@arndb.de>

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> The System Timer peripheral provides four 32-bit timer channels and a
> single 64-bit free running counter. Each channel has an output compare
> register, which is compared against the 32 least significant bits of the
> free running counter values, and generates an interrupt.
> 
> Timer 3 is used as the Linux timer.
> 
> The BCM2708 also contains an SP804-based timer module. However, it
> apparently has significant differences from the standard SP804 IP block,
> and Broadcom's documentation recommends using the system timer instead.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Moved struct sys_timer bcm2708_timer into time.c to encapsulate it more.
> * Added DT binding docs.
> * Moved to drivers/clocksource/. This looks like the desired location for
>   such code now.
> * Simplified bcm2708_time_init() to find one matching node and operate on
>   it, rather than looping over all matching nodes. This seems more
>   consistent with other clocksource code.
> * Renamed struct bcm2708_timer.index to match_mask to better represent its
>   purpose.
> * s/printk(PR_INFO/pr_info(/
> 
> Signed-off-by: Chris Boot <bootc at bootc.net>
> Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix at gmail.com>
> Signed-off-by: Dom Cobley <dc4 at broadcom.com>
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>

Acked-by: Arnd Bergmann <arnd at arndb.de>

Looks good to me, but I think the use of of_iomap() would be a good
simplification of the init function.

	Arnd


From arnd at arndb.de  Wed Sep 12 06:45:39 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Wed, 12 Sep 2012 10:45:39 +0000
Subject: [PATCH V3 5/5] ARM: bcm2708: instantiate console UART
In-Reply-To: <1347423509-30647-5-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <1347423509-30647-5-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209121045.39999.arnd@arndb.de>

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Modified UART DT node to use a unit-address to differentiate UART node
>   names, rather than using different base names "uart0" and "uart1".
>   Note that UART 1 (the Broadcom "mini UART") is not yet present, but
>   I'm naming the DT node in anticipation that it will be added.
> 

Shouldn't the selection be done using an alias like this?

	aliases {
		serial0 = &/uart at 20201000;
	};

	Arnd


From arnd at arndb.de  Wed Sep 12 07:27:37 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Wed, 12 Sep 2012 11:27:37 +0000
Subject: [PATCH V3 4/5] ARM: bcm2708: add stub clock driver
In-Reply-To: <1347423509-30647-4-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <1347423509-30647-4-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209121127.37495.arnd@arndb.de>

On Wednesday 12 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> This patch adds a minimal stub clock driver for the BCM2708. Its sole
> purpose is to allow the PL011 AMBA clk_get() API calls to provide
> something that looks enough like a clock that the driver probes and
> operates correctly.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Modified .dev_id for UART clocks to match UART DT node names.
> 
> Signed-off-by: Chris Boot <bootc at bootc.net>
> Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix at gmail.com>
> Signed-off-by: Dom Cobley <dc4 at broadcom.com>
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
> --
> v3: New patch.
> ---
>  arch/arm/mach-bcm2708/Makefile  |    1 +
>  arch/arm/mach-bcm2708/bcm2708.c |    3 +++
>  arch/arm/mach-bcm2708/clock.c   |   53 +++++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-bcm2708/clock.h   |   24 ++++++++++++++++++
>  4 files changed, 81 insertions(+)
>  create mode 100644 arch/arm/mach-bcm2708/clock.c
>  create mode 100644 arch/arm/mach-bcm2708/clock.h

I think you should keep Mike on Cc for clock related patches. I also wonder
whether this file should go into drivers/clk right away, since that is where
it would end up when it grows into a full clock driver.

	Arnd


From swarren at wwwdotorg.org  Wed Sep 12 21:12:32 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Wed, 12 Sep 2012 19:12:32 -0600
Subject: [PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver
In-Reply-To: <201209121037.43897.arnd@arndb.de>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <1347423509-30647-2-git-send-email-swarren@wwwdotorg.org>
 <201209121037.43897.arnd@arndb.de>
Message-ID: <50513300.6080403@wwwdotorg.org>

On 09/12/2012 04:37 AM, Arnd Bergmann wrote:
> On Wednesday 12 September 2012, Stephen Warren wrote:
>> From: Simon Arlott <simon at fire.lp0.eu>
>>
>> The BCM2708 contains a custom interrupt controller, which supports 72
>> interrupt sources using a 2-level register scheme. The interrupt
>> controller, or the HW block containing it, is referred to occasionally
>> as "armctrl" in the SoC documentation, hence the symbol naming in the
>> code.
>>
>> This patch was extracted from git://github.com/lp0/linux.git branch
>> rpi-split as of 2012/09/08, and modified as follows:
>>
>> * Added devicetree documentation, and hence removed list of IRQs from
>>   bcm2835.dtsi.
>> * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
>>   the size of the hwirq space, and pass the total size of the hwirq space
>>   to irq_domain_add_linear(), rather than just the number of valid hwirqs;
>>   the two are different due to the hwirq space being sparse.
> 
> If the IRQ space is very sparse, isn't it better to use a tree domain
> rather than a linear one?

It's not very sparse. There are 3 banks, each containing up to 32
interrupts. However, the first bank actually only has 8 interrupts plus
2 cascade inputs (which are hidden inside the interrupt controller
driver and so not exposed). So, it's more like there's one gap in the
middle. I don't know much about the tree domain, but I figure it's
probably not worth it.

>> * Added the interrupt controller DT node to the top-level of the DT,
>>   rather than nesting it inside a /axi node. Hence, changed the reg value
>>   since /axi had a ranges property. This seems simpler to me, but I'm not
>>   sure if everyone will like this change or not.
> 
> The layout should follow what the hardware looks like. If the interrupt
> controller is connected through axi, then I'd suggest describing it there
> unless there is a strong reason not to. The interrupt-parent property
> of the root node can easily point anywhere.

The problem is that there's no documentation of the actual bus
structure. Simon's original patch placed all peripherals under a single
top-level /axi bus/node, but the documentation mentions all of AXI, APB,
and AHB in passing, but doesn't explicitly describe which peripherals
are on which bus etc. I think I'd rather not represent the bus structure
in the .dtsi file at all, rather than represent just part of the
structure and hence be misleading.

>> @@ -0,0 +1,110 @@
>> +BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
>> +
>> +The BCM2708 contains a custom top-level interrupt controller, which supports
>> +72 interrupt sources using a 2-level register scheme. The interrupt
>> +controller, or the HW block containing it, is referred to occasionally
>> +as "armctrl" in the SoC documentation, hence naming of this binding.
> 
> Do we actually know that BCM2708 has the same one, or could it be present
> just on bcm2835? It seem hard to find any information about bcm2708,
> so I don't feel too good about using that name in bindings.

I don't know anything at all about the BCM2708 really. Perhaps Dom at
Broadcom can fill in some details?

A similar discussion was apparently held downstream, and IIRC the
reported decision there was that BCM2708 was the "parent" of a family of
SoCs, so they made all the DT stuff compatible with both 2708 and 2835.
Given the lack of documentation, I'd be quite happy to rework all of
this to say just BCM2835 instead, and drop any reference to BCM2708 at
all. Should I just go ahead and do that?

>> +asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
>> +	struct pt_regs *regs)
>> +{
>> +	u32 stat, irq;
>> +
>> +	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
>> +		if (stat & BANK0_HWIRQ_MASK) {
>> +			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
>> +			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
>> +		} else if (stat & SHORTCUT1_MASK) {
>> +			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
>> +		} else if (stat & SHORTCUT2_MASK) {
>> +			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
>> +		} else if (stat & BANK1_HWIRQ) {
>> +			armctrl_handle_bank(1, regs);
>> +		} else if (stat & BANK2_HWIRQ) {
>> +			armctrl_handle_bank(2, regs);
>> +		} else {
>> +			BUG();
>> +		}
>> +	}
>> +}
> 
> I'm not sure if readl_relaxed() is appropriate here, or if you need readl().
> If you have an MSI type interrupt signaling the completion of a DMA, you
> need to ensure ordering between the data transfer and the interrupt
> notification.

I did wonder about this. I suppose it would be safe to globally replace
all readl/writel_relaxed with plain readl/writel, and fix this up later
if we can justify it. Should I go ahead and do that?


From swarren at wwwdotorg.org  Wed Sep 12 21:15:55 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Wed, 12 Sep 2012 19:15:55 -0600
Subject: [PATCH V3 5/5] ARM: bcm2708: instantiate console UART
In-Reply-To: <201209121045.39999.arnd@arndb.de>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <1347423509-30647-5-git-send-email-swarren@wwwdotorg.org>
 <201209121045.39999.arnd@arndb.de>
Message-ID: <505133CB.1060906@wwwdotorg.org>

On 09/12/2012 04:45 AM, Arnd Bergmann wrote:
> On Wednesday 12 September 2012, Stephen Warren wrote:
>> From: Simon Arlott <simon at fire.lp0.eu>
>>
>> This patch was extracted from git://github.com/lp0/linux.git branch
>> rpi-split as of 2012/09/08, and modified as follows:
>>
>> * Modified UART DT node to use a unit-address to differentiate UART node
>>   names, rather than using different base names "uart0" and "uart1".
>>   Note that UART 1 (the Broadcom "mini UART") is not yet present, but
>>   I'm naming the DT node in anticipation that it will be added.
>>
> 
> Shouldn't the selection be done using an alias like this?
> 
> 	aliases {
> 		serial0 = &/uart at 20201000;
> 	};

The "differentiate" was more "ensure that node names in DT are unique"
than anything to do with user-visible selection/identification.

I can certainly add the alias if you want, but I don't know what benefit
it will have, since I've never used aliases before.


From arnd at arndb.de  Thu Sep 13 06:36:29 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Thu, 13 Sep 2012 10:36:29 +0000
Subject: [PATCH V3 5/5] ARM: bcm2708: instantiate console UART
In-Reply-To: <505133CB.1060906@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <201209121045.39999.arnd@arndb.de> <505133CB.1060906@wwwdotorg.org>
Message-ID: <201209131036.29929.arnd@arndb.de>

On Thursday 13 September 2012, Stephen Warren wrote:
> On 09/12/2012 04:45 AM, Arnd Bergmann wrote:
> > On Wednesday 12 September 2012, Stephen Warren wrote:
> >> From: Simon Arlott <simon at fire.lp0.eu>
> >>
> >> This patch was extracted from git://github.com/lp0/linux.git branch
> >> rpi-split as of 2012/09/08, and modified as follows:
> >>
> >> * Modified UART DT node to use a unit-address to differentiate UART node
> >>   names, rather than using different base names "uart0" and "uart1".
> >>   Note that UART 1 (the Broadcom "mini UART") is not yet present, but
> >>   I'm naming the DT node in anticipation that it will be added.
> >>
> > 
> > Shouldn't the selection be done using an alias like this?
> > 
> >       aliases {
> >               serial0 = &/uart at 20201000;
> >       };
> 
> The "differentiate" was more "ensure that node names in DT are unique"
> than anything to do with user-visible selection/identification.
> 
> I can certainly add the alias if you want, but I don't know what benefit
> it will have, since I've never used aliases before.

The idea of the aliases is that you can identify which port to use
if one passes an argument like "console=ttyS0" or opens a specific
/dev/tty* device node. I believe we don't actually use it that way
at the moment though.

	Arnd


From arnd at arndb.de  Thu Sep 13 06:45:20 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Thu, 13 Sep 2012 10:45:20 +0000
Subject: [PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver
In-Reply-To: <50513300.6080403@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <201209121037.43897.arnd@arndb.de> <50513300.6080403@wwwdotorg.org>
Message-ID: <201209131045.20730.arnd@arndb.de>

On Thursday 13 September 2012, Stephen Warren wrote:
> On 09/12/2012 04:37 AM, Arnd Bergmann wrote:
> > If the IRQ space is very sparse, isn't it better to use a tree domain
> > rather than a linear one?
> 
> It's not very sparse. There are 3 banks, each containing up to 32
> interrupts. However, the first bank actually only has 8 interrupts plus
> 2 cascade inputs (which are hidden inside the interrupt controller
> driver and so not exposed). So, it's more like there's one gap in the
> middle. I don't know much about the tree domain, but I figure it's
> probably not worth it.

Ok, makes sense.

> >> * Added the interrupt controller DT node to the top-level of the DT,
> >>   rather than nesting it inside a /axi node. Hence, changed the reg value
> >>   since /axi had a ranges property. This seems simpler to me, but I'm not
> >>   sure if everyone will like this change or not.
> > 
> > The layout should follow what the hardware looks like. If the interrupt
> > controller is connected through axi, then I'd suggest describing it there
> > unless there is a strong reason not to. The interrupt-parent property
> > of the root node can easily point anywhere.
> 
> The problem is that there's no documentation of the actual bus
> structure. Simon's original patch placed all peripherals under a single
> top-level /axi bus/node, but the documentation mentions all of AXI, APB,
> and AHB in passing, but doesn't explicitly describe which peripherals
> are on which bus etc. I think I'd rather not represent the bus structure
> in the .dtsi file at all, rather than represent just part of the
> structure and hence be misleading.

Ok.

> >> @@ -0,0 +1,110 @@
> >> +BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
> >> +
> >> +The BCM2708 contains a custom top-level interrupt controller, which supports
> >> +72 interrupt sources using a 2-level register scheme. The interrupt
> >> +controller, or the HW block containing it, is referred to occasionally
> >> +as "armctrl" in the SoC documentation, hence naming of this binding.
> > 
> > Do we actually know that BCM2708 has the same one, or could it be present
> > just on bcm2835? It seem hard to find any information about bcm2708,
> > so I don't feel too good about using that name in bindings.
> 
> I don't know anything at all about the BCM2708 really. Perhaps Dom at
> Broadcom can fill in some details?
> 
> A similar discussion was apparently held downstream, and IIRC the
> reported decision there was that BCM2708 was the "parent" of a family of
> SoCs, so they made all the DT stuff compatible with both 2708 and 2835.
> Given the lack of documentation, I'd be quite happy to rework all of
> this to say just BCM2835 instead, and drop any reference to BCM2708 at
> all. Should I just go ahead and do that?

That's probably safer, yes.

> >> +asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
> >> +	struct pt_regs *regs)
> >> +{
> >> +	u32 stat, irq;
> >> +
> >> +	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
> >> +		if (stat & BANK0_HWIRQ_MASK) {
> >> +			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
> >> +			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
> >> +		} else if (stat & SHORTCUT1_MASK) {
> >> +			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
> >> +		} else if (stat & SHORTCUT2_MASK) {
> >> +			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
> >> +		} else if (stat & BANK1_HWIRQ) {
> >> +			armctrl_handle_bank(1, regs);
> >> +		} else if (stat & BANK2_HWIRQ) {
> >> +			armctrl_handle_bank(2, regs);
> >> +		} else {
> >> +			BUG();
> >> +		}
> >> +	}
> >> +}
> > 
> > I'm not sure if readl_relaxed() is appropriate here, or if you need readl().
> > If you have an MSI type interrupt signaling the completion of a DMA, you
> > need to ensure ordering between the data transfer and the interrupt
> > notification.
> 
> I did wonder about this. I suppose it would be safe to globally replace
> all readl/writel_relaxed with plain readl/writel, and fix this up later
> if we can justify it. Should I go ahead and do that?

The synchronizations can be a bit expensive, so in the interrupt controller
driver it makes sense to use at least writel_relaxed, which should always
be fine because you don't have to worry about outgoing DMAs.

Even for incoming DMA, I think there is only a need for the non-relaxed
version if we're actually dealing with MSI interrupts, because regular
level and edge triggered interrupts have no form of synchronization between
DMA completion and interrupt delivery anyway.

	Arnd


From cavokz at gmail.com  Thu Sep 13 15:51:27 2012
From: cavokz at gmail.com (Domenico Andreoli)
Date: Thu, 13 Sep 2012 21:51:27 +0200
Subject: [PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and
 Raspberry Pi
In-Reply-To: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <20120913195125.GA4240@raptus.dandreoli.com>

Hi Stephen,

On Tue, Sep 11, 2012 at 10:18:25PM -0600, Stephen Warren wrote:
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> diff --git a/Documentation/devicetree/bindings/arm/bcm2708.txt b/Documentation/devicetree/bindings/arm/bcm2708.txt
> new file mode 100644
> index 0000000..49eec61
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/bcm2708.txt
> @@ -0,0 +1,15 @@
> +Broadcom BCM2708 device tree bindings
> +-------------------------------------------
> +
> +Boards with the BCM2708 SoC, or another SoC in the BCM2708 family, shall have
> +the following properties:
> +
> +Required root node property:
> +
> +compatible = "broadcom,bcm2708";
> +
> +Boards with BCM2835 SoC shall *additionally* have the following properties:
> +
> +Required root node property:
> +
> +compatible = "broadcom,bcm2835";

Please update also the vendor prefixes index at
Documentation/devicetree/bindings/vendor-prefixes.txt.

BTW is it possible to change it to "bcm"?

Regards,
Domenico 

-----[ Domenico Andreoli, aka cavok
 --[ http://cavokz.wordpress.com/gpgkey/
   ---[ 3A0F 2F80 F79C 678A 8936  4FEE 0677 9033 A20E BC50


From swarren at wwwdotorg.org  Thu Sep 13 22:16:34 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 13 Sep 2012 20:16:34 -0600
Subject: [PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and
 Raspberry Pi
In-Reply-To: <20120913195125.GA4240@raptus.dandreoli.com>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <20120913195125.GA4240@raptus.dandreoli.com>
Message-ID: <50529382.6000605@wwwdotorg.org>

On 09/13/2012 01:51 PM, Domenico Andreoli wrote:
> Hi Stephen,
> 
> On Tue, Sep 11, 2012 at 10:18:25PM -0600, Stephen Warren wrote:
>> From: Simon Arlott <simon at fire.lp0.eu>
>>
>> diff --git a/Documentation/devicetree/bindings/arm/bcm2708.txt b/Documentation/devicetree/bindings/arm/bcm2708.txt
>> new file mode 100644
>> index 0000000..49eec61
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/bcm2708.txt
>> @@ -0,0 +1,15 @@
>> +Broadcom BCM2708 device tree bindings
>> +-------------------------------------------
>> +
>> +Boards with the BCM2708 SoC, or another SoC in the BCM2708 family, shall have
>> +the following properties:
>> +
>> +Required root node property:
>> +
>> +compatible = "broadcom,bcm2708";
>> +
>> +Boards with BCM2835 SoC shall *additionally* have the following properties:
>> +
>> +Required root node property:
>> +
>> +compatible = "broadcom,bcm2835";
> 
> Please update also the vendor prefixes index at
> Documentation/devicetree/bindings/vendor-prefixes.txt.

Oops, yes, I forgot that.

> BTW is it possible to change it to "bcm"?

I believe standard practice is to use the stock ticker symbol if not
using the full company name, so that'd be "brcm". Does anyone have an
objection? I'll assume not and make the change...


From swarren at wwwdotorg.org  Thu Sep 13 22:21:14 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 13 Sep 2012 20:21:14 -0600
Subject: [PATCH V3 2/5] ARM: bcm2708: add interrupt controller driver
In-Reply-To: <201209131045.20730.arnd@arndb.de>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <201209121037.43897.arnd@arndb.de> <50513300.6080403@wwwdotorg.org>
 <201209131045.20730.arnd@arndb.de>
Message-ID: <5052949A.1020909@wwwdotorg.org>

On 09/13/2012 04:45 AM, Arnd Bergmann wrote:
> On Thursday 13 September 2012, Stephen Warren wrote:
>> On 09/12/2012 04:37 AM, Arnd Bergmann wrote:

>>>> @@ -0,0 +1,110 @@
>>>> +BCM2708 Top-Level ("ARMCTRL") Interrupt Controller
>>>> +
>>>> +The BCM2708 contains a custom top-level interrupt controller, which supports
>>>> +72 interrupt sources using a 2-level register scheme. The interrupt
>>>> +controller, or the HW block containing it, is referred to occasionally
>>>> +as "armctrl" in the SoC documentation, hence naming of this binding.
>>>
>>> Do we actually know that BCM2708 has the same one, or could it be present
>>> just on bcm2835? It seem hard to find any information about bcm2708,
>>> so I don't feel too good about using that name in bindings.
>>
>> I don't know anything at all about the BCM2708 really. Perhaps Dom at
>> Broadcom can fill in some details?
>>
>> A similar discussion was apparently held downstream, and IIRC the
>> reported decision there was that BCM2708 was the "parent" of a family of
>> SoCs, so they made all the DT stuff compatible with both 2708 and 2835.
>> Given the lack of documentation, I'd be quite happy to rework all of
>> this to say just BCM2835 instead, and drop any reference to BCM2708 at
>> all. Should I just go ahead and do that?
> 
> That's probably safer, yes.

Sounds good. For reference, I found:

https://github.com/raspberrypi/linux/issues/22

... where it sounds like BCM2708 isn't actually a chip at all, but a
family name, so that supports this change.

>>>> +asmlinkage void __exception_irq_entry bcm2708_armctrl_handle_irq(
>>>> +	struct pt_regs *regs)
>>>> +{
>>>> +	u32 stat, irq;
>>>> +
>>>> +	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
>>>> +		if (stat & BANK0_HWIRQ_MASK) {
>>>> +			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
>>>> +			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
>>>> +		} else if (stat & SHORTCUT1_MASK) {
>>>> +			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
>>>> +		} else if (stat & SHORTCUT2_MASK) {
>>>> +			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
>>>> +		} else if (stat & BANK1_HWIRQ) {
>>>> +			armctrl_handle_bank(1, regs);
>>>> +		} else if (stat & BANK2_HWIRQ) {
>>>> +			armctrl_handle_bank(2, regs);
>>>> +		} else {
>>>> +			BUG();
>>>> +		}
>>>> +	}
>>>> +}
>>>
>>> I'm not sure if readl_relaxed() is appropriate here, or if you need readl().
>>> If you have an MSI type interrupt signaling the completion of a DMA, you
>>> need to ensure ordering between the data transfer and the interrupt
>>> notification.
>>
>> I did wonder about this. I suppose it would be safe to globally replace
>> all readl/writel_relaxed with plain readl/writel, and fix this up later
>> if we can justify it. Should I go ahead and do that?
> 
> The synchronizations can be a bit expensive, so in the interrupt controller
> driver it makes sense to use at least writel_relaxed, which should always
> be fine because you don't have to worry about outgoing DMAs.

Thinking some more about this - I doubt there are any MSI-style
interrupts; there's certainly no PCI/PCIe on the Raspberry Pi board, and
none documented in the SoC itself (although admittedly only a small
subset of the SoC is publicly documented). I guess it's easiest just to
leave that code as-is, and fix it up if the hardware ever turns out to
be more complex, and actually have MSI.


From swarren at wwwdotorg.org  Fri Sep 14 00:41:24 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 13 Sep 2012 22:41:24 -0600
Subject: [PATCH V4 5/5] ARM: bcm2835: instantiate console UART
In-Reply-To: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347597684-30805-5-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Modified UART DT node to use a unit-address to create unique UART node
  names, rather than using non-type names "uart0" and "uart1".
  Note that UART 1 (the Broadcom "mini UART") is not yet present, but
  I'm naming the DT node in anticipation that it will be added.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
--
v4:
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.
---
 arch/arm/boot/dts/bcm2835.dtsi |    9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index c7ac399..e837780 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -6,7 +6,7 @@
 	interrupt-parent = <&intc>;
 
 	chosen {
-		bootargs = "earlyprintk";
+		bootargs = "earlyprintk console=ttyAMA0";
 	};
 
 	timer {
@@ -22,4 +22,11 @@
 		interrupt-controller;
 		#interrupt-cells = <2>;
 	};
+
+	uart at 20201000 {
+		compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+		reg = <0x20201000 0x1000>;
+		interrupts = <2 25>;
+		clock-frequency = <3000000>;
+	};
 };
-- 
1.7.9.5



From swarren at wwwdotorg.org  Fri Sep 14 00:41:23 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 13 Sep 2012 22:41:23 -0600
Subject: [PATCH V4 4/5] ARM: bcm2835: add stub clock driver
In-Reply-To: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347597684-30805-4-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

This patch adds a minimal stub clock driver for the BCM2835. Its sole
purpose is to allow the PL011 AMBA clk_get() API calls to provide
something that looks enough like a clock that the driver probes and
operates correctly.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/clk/.
* Modified .dev_id for UART clocks to match UART DT node names.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Cc: Mike Turquette <mturquette at linaro.org>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
--
v4:
* Moved implementation to drivers/clk/.
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.
---
 arch/arm/mach-bcm2835/bcm2835.c |    3 +++
 drivers/clk/Makefile            |    1 +
 drivers/clk/clk-bcm2835.c       |   52 +++++++++++++++++++++++++++++++++++++++
 include/linux/clk/bcm2835.h     |   24 ++++++++++++++++++
 4 files changed, 80 insertions(+)
 create mode 100644 drivers/clk/clk-bcm2835.c
 create mode 100644 include/linux/clk/bcm2835.h

diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index e3f2968..f6fea49 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -16,6 +16,7 @@
 #include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
 #include <linux/bcm2835_timer.h>
+#include <linux/clk/bcm2835.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -38,6 +39,8 @@ void __init bcm2835_init(void)
 {
 	int ret;
 
+	bcm2835_init_clocks();
+
 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
 				   NULL);
 	if (ret) {
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 6492651..f3e828c 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
 obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed-rate.o clk-gate.o \
 				   clk-mux.o clk-divider.o clk-fixed-factor.o
 # SoCs specific
+obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
 obj-$(CONFIG_ARCH_NOMADIK)	+= clk-nomadik.o
 obj-$(CONFIG_ARCH_HIGHBANK)	+= clk-highbank.o
 obj-$(CONFIG_ARCH_MXS)		+= mxs/
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
new file mode 100644
index 0000000..148ac35
--- /dev/null
+++ b/drivers/clk/clk-bcm2835.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-private.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/bcm2835.h>
+
+/*
+ * These are fixed clocks (and device tree doesn't support clk!).
+ *
+ * They're probably not all root clocks and it may be possible to
+ * turn them on and off but until this is mapped out better it's
+ * the only way they can be used.
+ */
+DEFINE_CLK_FIXED_RATE(sys_pclk,   CLK_IS_ROOT, 250000000, 0);
+DEFINE_CLK_FIXED_RATE(apb_pclk,   CLK_IS_ROOT, 126000000, 0);
+DEFINE_CLK_FIXED_RATE(uart0_pclk, CLK_IS_ROOT,   3000000, 0);
+DEFINE_CLK_FIXED_RATE(uart1_pclk, CLK_IS_ROOT, 125000000, 0);
+
+static struct clk_lookup lookups[] = {
+	{ .con_id = "sys_pclk", .clk = &sys_pclk },
+	{ .con_id = "apb_pclk", .clk = &apb_pclk },
+	{ .dev_id = "20201000.uart", .clk = &uart0_pclk },
+	{ .dev_id = "20215000.uart", .clk = &uart1_pclk }
+};
+
+void __init bcm2835_init_clocks(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+		__clk_init(NULL, lookups[i].clk);
+		clkdev_add(&lookups[i]);
+	}
+}
diff --git a/include/linux/clk/bcm2835.h b/include/linux/clk/bcm2835.h
new file mode 100644
index 0000000..aa937f6
--- /dev/null
+++ b/include/linux/clk/bcm2835.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_CLK_BCM2835_H_
+#define __LINUX_CLK_BCM2835_H_
+
+void __init bcm2835_init_clocks(void);
+
+#endif
-- 
1.7.9.5



From swarren at wwwdotorg.org  Fri Sep 14 00:41:22 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 13 Sep 2012 22:41:22 -0600
Subject: [PATCH V4 3/5] ARM: bcm2835: add system timer
In-Reply-To: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347597684-30805-3-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The System Timer peripheral provides four 32-bit timer channels and a
single 64-bit free running counter. Each channel has an output compare
register, which is compared against the 32 least significant bits of the
free running counter values, and generates an interrupt.

Timer 3 is used as the Linux timer.

The BCM2835 also contains an SP804-based timer module. However, it
apparently has significant differences from the standard SP804 IP block,
and Broadcom's documentation recommends using the system timer instead.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved to drivers/clocksource/. This looks like the desired location for
  such code now.
* Added DT binding docs.
* Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more.
* Simplified bcm2835_time_init() to find one matching node and operate on
  it, rather than looping over all matching nodes. This seems more
  consistent with other clocksource code.
* Simplified bcm2835_time_init() using of_iomap().
* Renamed struct bcm2835_timer.index to match_mask to better represent its
  purpose.
* s/printk(PR_INFO/pr_info(/

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd at arndb.de>
---
v4:
* Simplified bcm2835_time_init() using of_iomap().
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.
---
 .../bindings/timer/brcm,bcm2835-system-timer.txt   |   22 +++
 arch/arm/boot/dts/bcm2835.dtsi                     |    7 +
 arch/arm/mach-bcm2835/bcm2835.c                    |   10 +-
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/bcm2835_timer.c                |  161 ++++++++++++++++++++
 include/linux/bcm2835_timer.h                      |   22 +++
 6 files changed, 214 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
 create mode 100644 drivers/clocksource/bcm2835_timer.c
 create mode 100644 include/linux/bcm2835_timer.h

diff --git a/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt b/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
new file mode 100644
index 0000000..a0b727f
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
@@ -0,0 +1,22 @@
+BCM2835 System Timer
+
+The System Timer peripheral provides four 32-bit timer channels and a
+single 64-bit free running counter. Each channel has an output compare
+register, which is compared against the 32 least significant bits of the
+free running counter values, and generates an interrupt.
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-system-timer.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 4 interrupt sinks; one per timer channel.
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+	compatible = "brcm,bcm2835-system-timer";
+	reg = <0x20003000 0x1000>;
+	interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+	clock-frequency = <1000000>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 33e8d533..c7ac399 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -9,6 +9,13 @@
 		bootargs = "earlyprintk";
 	};
 
+	timer {
+		compatible = "brcm,bcm2835-system-timer";
+		reg = <0x20003000 0x1000>;
+		interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+		clock-frequency = <1000000>;
+	};
+
 	intc: interrupt-controller {
 		compatible = "brcm,bcm2835-armctrl-ic";
 		reg = <0x2000b200 0x200>;
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index 72c4b5f..e3f2968 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -15,10 +15,10 @@
 #include <linux/init.h>
 #include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
+#include <linux/bcm2835_timer.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/time.h>
 
 #include <mach/bcm2835_soc.h>
 
@@ -46,14 +46,6 @@ void __init bcm2835_init(void)
 	}
 }
 
-static void __init bcm2835_timer_init(void)
-{
-}
-
-struct sys_timer bcm2835_timer = {
-	.init = bcm2835_timer_init
-};
-
 static const char * const bcm2835_compat[] = {
 	"brcm,bcm2835",
 	NULL
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 6591990..cccde85 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_DW_APB_TIMER_OF)	+= dw_apb_timer_of.o
 obj-$(CONFIG_CLKSRC_DBX500_PRCMU)	+= clksrc-dbx500-prcmu.o
 obj-$(CONFIG_ARMADA_370_XP_TIMER)	+= time-armada-370-xp.o
 obj-$(CONFIG_CLKSRC_ARM_GENERIC)	+= arm_generic.o
+obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835_timer.o
diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c
new file mode 100644
index 0000000..bc19f12
--- /dev/null
+++ b/drivers/clocksource/bcm2835_timer.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/bcm2835_timer.h>
+#include <linux/bitops.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/interrupt.h>
+#include <linux/irqreturn.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+
+#include <asm/sched_clock.h>
+#include <asm/irq.h>
+
+#define REG_CONTROL	0x00
+#define REG_COUNTER_LO	0x04
+#define REG_COUNTER_HI	0x08
+#define REG_COMPARE(n)	(0x0c + (n) * 4)
+#define MAX_TIMER	3
+#define DEFAULT_TIMER	3
+
+struct bcm2835_timer {
+	void __iomem *control;
+	void __iomem *compare;
+	int match_mask;
+	struct clock_event_device evt;
+	struct irqaction act;
+};
+
+static void __iomem *system_clock __read_mostly;
+
+static u32 notrace bcm2835_sched_read(void)
+{
+	return readl_relaxed(system_clock);
+}
+
+static void bcm2835_time_set_mode(enum clock_event_mode mode,
+	struct clock_event_device *evt_dev)
+{
+	switch (mode) {
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
+		break;
+	default:
+		WARN(1, "%s: unhandled event mode %d\n", __func__, mode);
+		break;
+	}
+}
+
+static int bcm2835_time_set_next_event(unsigned long event,
+	struct clock_event_device *evt_dev)
+{
+	struct bcm2835_timer *timer = container_of(evt_dev,
+		struct bcm2835_timer, evt);
+	writel_relaxed(readl_relaxed(system_clock) + event,
+		timer->compare);
+	return 0;
+}
+
+static irqreturn_t bcm2835_time_interrupt(int irq, void *dev_id)
+{
+	struct bcm2835_timer *timer = dev_id;
+	void (*event_handler)(struct clock_event_device *);
+	if (readl_relaxed(timer->control) & timer->match_mask) {
+		writel_relaxed(timer->match_mask, timer->control);
+
+		event_handler = ACCESS_ONCE(timer->evt.event_handler);
+		if (event_handler)
+			event_handler(&timer->evt);
+		return IRQ_HANDLED;
+	} else {
+		return IRQ_NONE;
+	}
+}
+
+static struct of_device_id bcm2835_time_match[] __initconst = {
+	{ .compatible = "brcm,bcm2835-system-timer" },
+	{}
+};
+
+static void __init bcm2835_time_init(void)
+{
+	struct device_node *node;
+	void __iomem *base;
+	u32 freq;
+	int irq;
+	struct bcm2835_timer *timer;
+
+	node = of_find_matching_node(NULL, bcm2835_time_match);
+	if (!node)
+		panic("No bcm2835 timer node");
+
+	base = of_iomap(node, 0);
+	if (!base)
+		panic("Can't remap registers");
+
+	if (of_property_read_u32(node, "clock-frequency", &freq))
+		panic("Can't read clock-frequency");
+
+	system_clock = base + REG_COUNTER_LO;
+	setup_sched_clock(bcm2835_sched_read, 32, freq);
+
+	clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
+		freq, 300, 32, clocksource_mmio_readl_up);
+
+	irq = irq_of_parse_and_map(node, DEFAULT_TIMER);
+	if (irq <= 0)
+		panic("Can't parse IRQ");
+
+	timer = kzalloc(sizeof(*timer), GFP_KERNEL);
+	if (!timer)
+		panic("Can't allocate timer struct\n");
+
+	timer->control = base + REG_CONTROL;
+	timer->compare = base + REG_COMPARE(DEFAULT_TIMER);
+	timer->match_mask = BIT(DEFAULT_TIMER);
+	timer->evt.name = node->name;
+	timer->evt.rating = 300;
+	timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
+	timer->evt.set_mode = bcm2835_time_set_mode;
+	timer->evt.set_next_event = bcm2835_time_set_next_event;
+	timer->evt.cpumask = cpumask_of(0);
+	timer->act.name = node->name;
+	timer->act.flags = IRQF_TIMER | IRQF_SHARED;
+	timer->act.dev_id = timer;
+	timer->act.handler = bcm2835_time_interrupt;
+
+	if (setup_irq(irq, &timer->act))
+		panic("Can't set up timer IRQ\n");
+
+	clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
+
+	pr_info("bcm2835: system timer (irq = %d)\n", irq);
+}
+
+struct sys_timer bcm2835_timer = {
+	.init = bcm2835_time_init,
+};
diff --git a/include/linux/bcm2835_timer.h b/include/linux/bcm2835_timer.h
new file mode 100644
index 0000000..25680fe
--- /dev/null
+++ b/include/linux/bcm2835_timer.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BCM2835_TIMER_H
+#define __BCM2835_TIMER_H
+
+#include <asm/mach/time.h>
+
+extern struct sys_timer bcm2835_timer;
+
+#endif
-- 
1.7.9.5



From swarren at wwwdotorg.org  Fri Sep 14 00:41:21 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 13 Sep 2012 22:41:21 -0600
Subject: [PATCH V4 2/5] ARM: bcm2835: add interrupt controller driver
In-Reply-To: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347597684-30805-2-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The BCM2835 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/irchip/.
* Added devicetree documentation, and hence removed list of IRQs from
  bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
  the size of the hwirq space, and pass the total size of the hwirq space
  to irq_domain_add_linear(), rather than just the number of valid hwirqs;
  the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
  rather than nesting it inside a /axi node. Hence, changed the reg value
  since /axi had a ranges property. This seems simpler to me, but I'm not
  sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
  removing the need to patch include/linux/irqdomain.h or
  kernel/irq/irqdomain.c.
* Simplified armctrl_of_init() using of_iomap().
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
  controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
--
v4:
* Moved IRQ driver to drivers/irqchip/.
* Simplified armctrl_of_init() using of_iomap().
* Moved binding into Documentation/devicetree/bindings/interrupt-controller/.
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.
---
 .../brcm,bcm2835-armctrl-ic.txt                    |  110 ++++++++++
 arch/arm/boot/dts/bcm2835.dtsi                     |    8 +
 arch/arm/mach-bcm2835/bcm2835.c                    |   10 +-
 drivers/Kconfig                                    |    2 +
 drivers/Makefile                                   |    1 +
 drivers/irqchip/Makefile                           |    1 +
 drivers/irqchip/irq-bcm2835.c                      |  223 ++++++++++++++++++++
 include/linux/irqchip/bcm2835.h                    |   29 +++
 8 files changed, 375 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
 create mode 100644 drivers/irqchip/Kconfig
 create mode 100644 drivers/irqchip/Makefile
 create mode 100644 drivers/irqchip/irq-bcm2835.c
 create mode 100644 include/linux/irqchip/bcm2835.h

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
new file mode 100644
index 0000000..7bcf2f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
@@ -0,0 +1,110 @@
+BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
+
+The BCM2835 contains a custom top-level interrupt controller, which supports
+72 interrupt sources using a 2-level register scheme. The interrupt
+controller, or the HW block containing it, is referred to occasionally
+as "armctrl" in the SoC documentation, hence naming of this binding.
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-armctrl-ic.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 2.
+
+  The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic
+  pending" register, or 1/2 respectively for interrupts in the "IRQ pending
+  1/2" register.
+
+  The 2nd cell contains the interrupt number within the bank. Valid values
+  are 0..7 for bank 0, and 0..31 for bank 1.
+
+The interrupt sources are as follows:
+
+Bank 0:
+0: ARM_TIMER
+1: ARM_MAILBOX
+2: ARM_DOORBELL_0
+3: ARM_DOORBELL_1
+4: VPU0_HALTED
+5: VPU1_HALTED
+6: ILLEGAL_TYPE0
+7: ILLEGAL_TYPE1
+
+Bank 1:
+0: TIMER0
+1: TIMER1
+2: TIMER2
+3: TIMER3
+4: CODEC0
+5: CODEC1
+6: CODEC2
+7: VC_JPEG
+8: ISP
+9: VC_USB
+10: VC_3D
+11: TRANSPOSER
+12: MULTICORESYNC0
+13: MULTICORESYNC1
+14: MULTICORESYNC2
+15: MULTICORESYNC3
+16: DMA0
+17: DMA1
+18: VC_DMA2
+19: VC_DMA3
+20: DMA4
+21: DMA5
+22: DMA6
+23: DMA7
+24: DMA8
+25: DMA9
+26: DMA10
+27: DMA11
+28: DMA12
+29: AUX
+30: ARM
+31: VPUDMA
+
+Bank 2:
+0: HOSTPORT
+1: VIDEOSCALER
+2: CCP2TX
+3: SDC
+4: DSI0
+5: AVE
+6: CAM0
+7: CAM1
+8: HDMI0
+9: HDMI1
+10: PIXELVALVE1
+11: I2CSPISLV
+12: DSI1
+13: PWA0
+14: PWA1
+15: CPR
+16: SMI
+17: GPIO0
+18: GPIO1
+19: GPIO2
+20: GPIO3
+21: VC_I2C
+22: VC_SPI
+23: VC_I2SPCM
+24: VC_SDIO
+25: VC_UART
+26: SLIMBUS
+27: VEC
+28: CPG
+29: RNG
+30: VC_ARASANSDIO
+31: AVSPMON
+
+Example:
+
+intc: interrupt-controller {
+	compatible = "brcm,bcm2835-armctrl-ic";
+	reg = <0x2000b200 0x200>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 7e5c5a4..33e8d533 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -3,8 +3,16 @@
 / {
 	compatible = "brcm,bcm2835";
 	model = "BCM2835";
+	interrupt-parent = <&intc>;
 
 	chosen {
 		bootargs = "earlyprintk";
 	};
+
+	intc: interrupt-controller {
+		compatible = "brcm,bcm2835-armctrl-ic";
+		reg = <0x2000b200 0x200>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
 };
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index f6b36b4..72c4b5f 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -13,12 +13,12 @@
  */
 
 #include <linux/init.h>
+#include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
-#include <asm/exception.h>
 
 #include <mach/bcm2835_soc.h>
 
@@ -34,14 +34,6 @@ void __init bcm2835_map_io(void)
 	iotable_init(&io_map, 1);
 }
 
-void __init bcm2835_init_irq(void)
-{
-}
-
-asmlinkage void __exception_irq_entry bcm2835_handle_irq(struct pt_regs *regs)
-{
-}
-
 void __init bcm2835_init(void)
 {
 	int ret;
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 324e958..dbdefa3 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -154,4 +154,6 @@ source "drivers/vme/Kconfig"
 
 source "drivers/pwm/Kconfig"
 
+source "drivers/irqchip/Kconfig"
+
 endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index d64a0f7..f776bd6 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -6,6 +6,7 @@
 #
 
 obj-y				+= bus/
+obj-y				+= irqchip/
 
 # GPIO must come after pinctrl as gpios may need to mux pins etc
 obj-y				+= pinctrl/
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
new file mode 100644
index 0000000..e69de29
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
new file mode 100644
index 0000000..054321d
--- /dev/null
+++ b/drivers/irqchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
new file mode 100644
index 0000000..dc670cc
--- /dev/null
+++ b/drivers/irqchip/irq-bcm2835.c
@@ -0,0 +1,223 @@
+/*
+ * Copyright 2010 Broadcom
+ * Copyright 2012 Simon Arlott, Chris Boot, Stephen Warren
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Quirk 1: Shortcut interrupts don't set the bank 1/2 register pending bits
+ *
+ * If an interrupt fires on bank 1 that isn't in the shortcuts list, bit 8
+ * on bank 0 is set to signify that an interrupt in bank 1 has fired, and
+ * to look in the bank 1 status register for more information.
+ *
+ * If an interrupt fires on bank 1 that _is_ in the shortcuts list, its
+ * shortcut bit in bank 0 is set as well as its interrupt bit in the bank 1
+ * status register, but bank 0 bit 8 is _not_ set.
+ *
+ * Quirk 2: You can't mask the register 1/2 pending interrupts
+ *
+ * In a proper cascaded interrupt controller, the interrupt lines with
+ * cascaded interrupt controllers on them are just normal interrupt lines.
+ * You can mask the interrupts and get on with things. With this controller
+ * you can't do that.
+ *
+ * Quirk 3: The shortcut interrupts can't be (un)masked in bank 0
+ *
+ * Those interrupts that have shortcuts can only be masked/unmasked in
+ * their respective banks' enable/disable registers. Doing so in the bank 0
+ * enable/disable registers has no effect.
+ *
+ * The FIQ control register:
+ *  Bits 0-6: IRQ (index in order of interrupts from banks 1, 2, then 0)
+ *  Bit    7: Enable FIQ generation
+ *  Bits  8+: Unused
+ *
+ * An interrupt must be disabled before configuring it for FIQ generation
+ * otherwise both handlers will fire at the same time!
+ */
+
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/irqchip/bcm2835.h>
+
+#include <asm/exception.h>
+
+/* Put the bank and irq (32 bits) into the hwirq */
+#define MAKE_HWIRQ(b, n)	((b << 5) | (n))
+#define HWIRQ_BANK(i)		(i >> 5)
+#define HWIRQ_BIT(i)		BIT(i & 0x1f)
+
+#define NR_IRQS_BANK0		8
+#define BANK0_HWIRQ_MASK	0xff
+/* Shortcuts can't be disabled so any unknown new ones need to be masked */
+#define SHORTCUT1_MASK		0x00007c00
+#define SHORTCUT2_MASK		0x001f8000
+#define SHORTCUT_SHIFT		10
+#define BANK1_HWIRQ		BIT(8)
+#define BANK2_HWIRQ		BIT(9)
+#define BANK0_VALID_MASK	(BANK0_HWIRQ_MASK | BANK1_HWIRQ | BANK2_HWIRQ \
+					| SHORTCUT1_MASK | SHORTCUT2_MASK)
+
+#define REG_FIQ_CONTROL		0x0c
+
+#define NR_BANKS		3
+#define IRQS_PER_BANK		32
+
+static int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
+static int reg_enable[] __initconst = { 0x18, 0x10, 0x14 };
+static int reg_disable[] __initconst = { 0x24, 0x1c, 0x20 };
+static int bank_irqs[] __initconst = { 8, 32, 32 };
+
+static const int shortcuts[] = {
+	7, 9, 10, 18, 19,		/* Bank 1 */
+	21, 22, 23, 24, 25, 30		/* Bank 2 */
+};
+
+struct armctrl_ic {
+	void __iomem *base;
+	void __iomem *pending[NR_BANKS];
+	void __iomem *enable[NR_BANKS];
+	void __iomem *disable[NR_BANKS];
+	struct irq_domain *domain;
+};
+
+static struct armctrl_ic intc __read_mostly;
+
+static void armctrl_mask_irq(struct irq_data *d)
+{
+	writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]);
+}
+
+static void armctrl_unmask_irq(struct irq_data *d)
+{
+	writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]);
+}
+
+static struct irq_chip armctrl_chip = {
+	.name = "ARMCTRL-level",
+	.irq_mask = armctrl_mask_irq,
+	.irq_unmask = armctrl_unmask_irq
+};
+
+static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr,
+	const u32 *intspec, unsigned int intsize,
+	unsigned long *out_hwirq, unsigned int *out_type)
+{
+	if (WARN_ON(intsize != 2))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[0] >= NR_BANKS))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[1] >= IRQS_PER_BANK))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[0] == 0 && intspec[1] >= NR_IRQS_BANK0))
+		return -EINVAL;
+
+	*out_hwirq = MAKE_HWIRQ(intspec[0], intspec[1]);
+	*out_type = IRQ_TYPE_NONE;
+	return 0;
+}
+
+static struct irq_domain_ops armctrl_ops = {
+	.xlate = armctrl_xlate
+};
+
+static int __init armctrl_of_init(struct device_node *node,
+	struct device_node *parent)
+{
+	void __iomem *base;
+	int irq, b, i;
+
+	base = of_iomap(node, 0);
+	if (!base)
+		panic("%s: unable to map IC registers\n",
+			node->full_name);
+
+	intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0),
+			&armctrl_ops, NULL);
+	if (!intc.domain)
+		panic("%s: unable to create IRQ domain\n", node->full_name);
+
+	for (b = 0; b < NR_BANKS; b++) {
+		intc.pending[b] = base + reg_pending[b];
+		intc.enable[b] = base + reg_enable[b];
+		intc.disable[b] = base + reg_disable[b];
+
+		for (i = 0; i < bank_irqs[b]; i++) {
+			irq = irq_create_mapping(intc.domain, MAKE_HWIRQ(b, i));
+			BUG_ON(irq <= 0);
+			irq_set_chip_and_handler(irq, &armctrl_chip,
+				handle_level_irq);
+			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+		}
+	}
+	return 0;
+}
+
+static struct of_device_id irq_of_match[] __initconst = {
+	{ .compatible = "brcm,bcm2835-armctrl-ic", .data = armctrl_of_init }
+};
+
+void __init bcm2835_init_irq(void)
+{
+	of_irq_init(irq_of_match);
+}
+
+/*
+ * Handle each interrupt across the entire interrupt controller.  This reads the
+ * status register before handling each interrupt, which is necessary given that
+ * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
+ */
+
+static void armctrl_handle_bank(int bank, struct pt_regs *regs)
+{
+	u32 stat, irq;
+
+	while ((stat = readl_relaxed(intc.pending[bank]))) {
+		irq = MAKE_HWIRQ(bank, ffs(stat) - 1);
+		handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+	}
+}
+
+static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,
+	u32 stat)
+{
+	u32 irq = MAKE_HWIRQ(bank, shortcuts[ffs(stat >> SHORTCUT_SHIFT) - 1]);
+	handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+}
+
+asmlinkage void __exception_irq_entry bcm2835_handle_irq(
+	struct pt_regs *regs)
+{
+	u32 stat, irq;
+
+	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
+		if (stat & BANK0_HWIRQ_MASK) {
+			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
+			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+		} else if (stat & SHORTCUT1_MASK) {
+			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
+		} else if (stat & SHORTCUT2_MASK) {
+			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
+		} else if (stat & BANK1_HWIRQ) {
+			armctrl_handle_bank(1, regs);
+		} else if (stat & BANK2_HWIRQ) {
+			armctrl_handle_bank(2, regs);
+		} else {
+			BUG();
+		}
+	}
+}
diff --git a/include/linux/irqchip/bcm2835.h b/include/linux/irqchip/bcm2835.h
new file mode 100644
index 0000000..48a859b
--- /dev/null
+++ b/include/linux/irqchip/bcm2835.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_IRQCHIP_BCM2835_H_
+#define __LINUX_IRQCHIP_BCM2835_H_
+
+#include <asm/exception.h>
+
+extern void bcm2835_init_irq(void);
+
+extern asmlinkage void __exception_irq_entry bcm2835_handle_irq(
+	struct pt_regs *regs);
+
+#endif
-- 
1.7.9.5



From swarren at wwwdotorg.org  Fri Sep 14 00:41:20 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 13 Sep 2012 22:41:20 -0600
Subject: [PATCH V4 1/5] ARM: add infra-structure for BCM2835 and Raspberry Pi
Message-ID: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic
support for this SoC.

http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd

Note that the documentation in the latter .pdf assumes the MMU setup
that's used on the "VideoCore" companion processor, and does not document
physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
addresses.

The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
minimal device tree for this board; enough to see some very early kernel
boot messages through earlyprintk. However, this patch does not yet
provide a useful booting system.

http://www.raspberrypi.org/.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split from 3-4 months ago, and significantly stripped down and
modified since.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd at arndb.de>
---
v4:
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix from broadcom to brcm.
* Document device tree vendor prefix.
* Added VFP (Kconfig help says one must be selected) and EABI (to match
  binaries produced by RPi toolchains, so user-space works) to defconfig.
v3:
* Added DT binding documentation for the SoC itself.
* Changed patch subject from "support" to "infra-structure", and added
  to the commit description, to indicate that the patch isn't adding
  complete support for the SoC/board.
* Added all S-o-b tags from downstream, now that I have permission to
  fix them up to be valid.
* Changed patch author to Simon Arlott, now I have permission to change
  his email address to something valid.
* Limited my (c) additions to files I created; the other changes turnd
  out to be trivial.
v2:
* Rename *_BASE to *_PHYS to match Simon's rpi-split branch.
* Remove #define UART_BAUD since it isn't used.
* Don't select WATCHDOG from ARCH_BCM2835
* Remove 8250 and PL010 serial ports from bcm2835_defconfig
* Remove <mach/hardware.h>
* Rename common.c back to bcm2835.c; matches downstream and is
  preferred naming style.
---
 Documentation/devicetree/bindings/arm/bcm2835.txt  |    8 ++
 .../devicetree/bindings/vendor-prefixes.txt        |    1 +
 arch/arm/Kconfig                                   |   17 ++++
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/bcm2835-rpi-b.dts                |   12 +++
 arch/arm/boot/dts/bcm2835.dtsi                     |   10 +++
 arch/arm/configs/bcm2835_defconfig                 |   95 ++++++++++++++++++++
 arch/arm/mach-bcm2835/Makefile                     |    1 +
 arch/arm/mach-bcm2835/Makefile.boot                |    5 ++
 arch/arm/mach-bcm2835/bcm2835.c                    |   77 ++++++++++++++++
 arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h   |   29 ++++++
 arch/arm/mach-bcm2835/include/mach/debug-macro.S   |   21 +++++
 arch/arm/mach-bcm2835/include/mach/timex.h         |   26 ++++++
 arch/arm/mach-bcm2835/include/mach/uncompress.h    |   45 ++++++++++
 14 files changed, 348 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2835.txt
 create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2835.dtsi
 create mode 100644 arch/arm/configs/bcm2835_defconfig
 create mode 100644 arch/arm/mach-bcm2835/Makefile
 create mode 100644 arch/arm/mach-bcm2835/Makefile.boot
 create mode 100644 arch/arm/mach-bcm2835/bcm2835.c
 create mode 100644 arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h
 create mode 100644 arch/arm/mach-bcm2835/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-bcm2835/include/mach/timex.h
 create mode 100644 arch/arm/mach-bcm2835/include/mach/uncompress.h

diff --git a/Documentation/devicetree/bindings/arm/bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm2835.txt
new file mode 100644
index 0000000..ac68348
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm2835.txt
@@ -0,0 +1,8 @@
+Broadcom BCM2835 device tree bindings
+-------------------------------------------
+
+Boards with the BCM2835 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "brcm,bcm2835";
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index db4d3af..4f293e5 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -10,6 +10,7 @@ apm	Applied Micro Circuits Corporation (APM)
 arm	ARM Ltd.
 atmel	Atmel Corporation
 bosch	Bosch Sensortec GmbH
+brcm	Broadcom Corporation
 cavium	Cavium, Inc.
 chrp	Common Hardware Reference Platform
 cortina	Cortina Systems, Inc.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d0021fe..04b063c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -349,6 +349,23 @@ config ARCH_AT91
 	  This enables support for systems based on Atmel
 	  AT91RM9200 and AT91SAM9* processors.
 
+config ARCH_BCM2835
+	bool "Broadcom BCM2835 family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_ERRATA_411920
+	select ARM_TIMER_SP804
+	select CLKDEV_LOOKUP
+	select COMMON_CLK
+	select CPU_V6
+	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  This enables support for the Broadcom BCM2835 SoC. This SoC is
+	  use in the Raspberry Pi, and Roku 2 devices.
+
 config ARCH_BCMRING
 	bool "Broadcom BCMRING"
 	depends on MMU
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a812d12..b1c333c 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -136,6 +136,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)		:= at91
+machine-$(CONFIG_ARCH_BCM2835)		:= bcm2835
 machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)		:= cns3xxx
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
new file mode 100644
index 0000000..7dd860f
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/memreserve/ 0x0c000000 0x04000000;
+/include/ "bcm2835.dtsi"
+
+/ {
+	compatible = "raspberrypi,model-b", "brcm,bcm2835";
+	model = "Raspberry Pi Model B";
+
+	memory {
+		reg = <0 0x10000000>;
+	};
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
new file mode 100644
index 0000000..7e5c5a4
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -0,0 +1,10 @@
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm2835";
+	model = "BCM2835";
+
+	chosen {
+		bootargs = "earlyprintk";
+	};
+};
diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig
new file mode 100644
index 0000000..7aea702
--- /dev/null
+++ b/arch/arm/configs/bcm2835_defconfig
@@ -0,0 +1,95 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_BLOCK is not set
+CONFIG_ARCH_BCM2835=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_AEABI=y
+CONFIG_COMPACTION=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_CLEANCACHE=y
+CONFIG_SECCOMP=y
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+CONFIG_VFP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_PRINTK_TIME=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_BOOT_PRINTK_DELAY=y
+CONFIG_SCHED_TRACER=y
+CONFIG_STACK_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_KGDB=y
+CONFIG_KGDB_KDB=y
+CONFIG_TEST_KSTRTOX=y
+CONFIG_STRICT_DEVMEM=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
diff --git a/arch/arm/mach-bcm2835/Makefile b/arch/arm/mach-bcm2835/Makefile
new file mode 100644
index 0000000..4c3892f
--- /dev/null
+++ b/arch/arm/mach-bcm2835/Makefile
@@ -0,0 +1 @@
+obj-y += bcm2835.o
diff --git a/arch/arm/mach-bcm2835/Makefile.boot b/arch/arm/mach-bcm2835/Makefile.boot
new file mode 100644
index 0000000..0831fd1
--- /dev/null
+++ b/arch/arm/mach-bcm2835/Makefile.boot
@@ -0,0 +1,5 @@
+   zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
+
+dtb-y += bcm2835-rpi-b.dtb
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
new file mode 100644
index 0000000..f6b36b4
--- /dev/null
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/exception.h>
+
+#include <mach/bcm2835_soc.h>
+
+static struct map_desc io_map __initdata = {
+	.virtual = BCM2835_PERIPH_VIRT,
+	.pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),
+	.length = BCM2835_PERIPH_SIZE,
+	.type = MT_DEVICE
+};
+
+void __init bcm2835_map_io(void)
+{
+	iotable_init(&io_map, 1);
+}
+
+void __init bcm2835_init_irq(void)
+{
+}
+
+asmlinkage void __exception_irq_entry bcm2835_handle_irq(struct pt_regs *regs)
+{
+}
+
+void __init bcm2835_init(void)
+{
+	int ret;
+
+	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
+				   NULL);
+	if (ret) {
+		pr_err("of_platform_populate failed: %d\n", ret);
+		BUG();
+	}
+}
+
+static void __init bcm2835_timer_init(void)
+{
+}
+
+struct sys_timer bcm2835_timer = {
+	.init = bcm2835_timer_init
+};
+
+static const char * const bcm2835_compat[] = {
+	"brcm,bcm2835",
+	NULL
+};
+
+DT_MACHINE_START(BCM2835, "BCM2835")
+	.map_io = bcm2835_map_io,
+	.init_irq = bcm2835_init_irq,
+	.handle_irq = bcm2835_handle_irq,
+	.init_machine = bcm2835_init,
+	.timer = &bcm2835_timer,
+	.dt_compat = bcm2835_compat
+MACHINE_END
diff --git a/arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h b/arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h
new file mode 100644
index 0000000..d4dfcf7
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_BCM2835_BCM2835_SOC_H__
+#define __MACH_BCM2835_BCM2835_SOC_H__
+
+#include <asm/sizes.h>
+
+#define BCM2835_PERIPH_PHYS	0x20000000
+#define BCM2835_PERIPH_VIRT	0xf0000000
+#define BCM2835_PERIPH_SIZE	SZ_16M
+#define BCM2835_DEBUG_PHYS	0x20201000
+#define BCM2835_DEBUG_VIRT	0xf0201000
+
+#endif
diff --git a/arch/arm/mach-bcm2835/include/mach/debug-macro.S b/arch/arm/mach-bcm2835/include/mach/debug-macro.S
new file mode 100644
index 0000000..8a161e4
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/debug-macro.S
@@ -0,0 +1,21 @@
+/*
+ * Debugging macro include header
+ *
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <mach/bcm2835_soc.h>
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rp, =BCM2835_DEBUG_PHYS
+	ldr	\rv, =BCM2835_DEBUG_VIRT
+	.endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-bcm2835/include/mach/timex.h b/arch/arm/mach-bcm2835/include/mach/timex.h
new file mode 100644
index 0000000..6d021e1
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/timex.h
@@ -0,0 +1,26 @@
+/*
+ *  BCM2835 system clock frequency
+ *
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+#define CLOCK_TICK_RATE		(1000000)
+
+#endif
diff --git a/arch/arm/mach-bcm2835/include/mach/uncompress.h b/arch/arm/mach-bcm2835/include/mach/uncompress.h
new file mode 100644
index 0000000..cc46dcc
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/uncompress.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/amba/serial.h>
+#include <mach/bcm2835_soc.h>
+
+#define UART0_BASE BCM2835_DEBUG_PHYS
+
+#define BCM2835_UART_DR IOMEM(UART0_BASE + UART01x_DR)
+#define BCM2835_UART_FR IOMEM(UART0_BASE + UART01x_FR)
+#define BCM2835_UART_CR IOMEM(UART0_BASE + UART011_CR)
+
+static inline void putc(int c)
+{
+	while (__raw_readl(BCM2835_UART_FR) & UART01x_FR_TXFF)
+		barrier();
+
+	__raw_writel(c, BCM2835_UART_DR);
+}
+
+static inline void flush(void)
+{
+	int fr;
+
+	do {
+		fr = __raw_readl(BCM2835_UART_FR);
+		barrier();
+	} while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE);
+}
+
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
-- 
1.7.9.5



From arnd at arndb.de  Fri Sep 14 03:55:38 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Fri, 14 Sep 2012 07:55:38 +0000
Subject: [PATCH V4 2/5] ARM: bcm2835: add interrupt controller driver
In-Reply-To: <1347597684-30805-2-git-send-email-swarren@wwwdotorg.org>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
 <1347597684-30805-2-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209140755.38523.arnd@arndb.de>

On Friday 14 September 2012, Stephen Warren wrote:
> 
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> The BCM2835 contains a custom interrupt controller, which supports 72
> interrupt sources using a 2-level register scheme. The interrupt
> controller, or the HW block containing it, is referred to occasionally
> as "armctrl" in the SoC documentation, hence the symbol naming in the
> code.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * s/bcm2708/bcm2835/.
> * Modified device tree vendor prefix.
> * Moved implementation to drivers/irchip/.
> * Added devicetree documentation, and hence removed list of IRQs from
>   bcm2835.dtsi.
> * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
>   the size of the hwirq space, and pass the total size of the hwirq space
>   to irq_domain_add_linear(), rather than just the number of valid hwirqs;
>   the two are different due to the hwirq space being sparse.
> * Added the interrupt controller DT node to the top-level of the DT,
>   rather than nesting it inside a /axi node. Hence, changed the reg value
>   since /axi had a ranges property. This seems simpler to me, but I'm not
>   sure if everyone will like this change or not.
> * Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
>   removing the need to patch include/linux/irqdomain.h or
>   kernel/irq/irqdomain.c.
> * Simplified armctrl_of_init() using of_iomap().
> * Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
> * Renamed armctrl_handle_irq() to prevent possible symbol clashes.
> * Made armctrl_of_init() static.
> * Removed comment "Each bank is registered as a separate interrupt
>   controller" since this is no longer true.
> * Removed FSF address from license header.
> * Added my name to copyright header.
> 
> Signed-off-by: Chris Boot <bootc at bootc.net>
> Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix at gmail.com>
> Signed-off-by: Dom Cobley <dc4 at broadcom.com>
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>

Acked-by: Arnd Bergmann <arnd at arndb.de>


From arnd at arndb.de  Fri Sep 14 03:50:43 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Fri, 14 Sep 2012 07:50:43 +0000
Subject: [PATCH V4 1/5] ARM: add infra-structure for BCM2835 and Raspberry
 Pi
In-Reply-To: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209140750.44039.arnd@arndb.de>

On Friday 14 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic
> support for this SoC.
> 
> http://www.broadcom.com/products/BCM2835
> http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd

Just looked at that document. Funny how they actually put details about
the kernel implementation (the static mapping address) into a hardware
manual.

> Note that the documentation in the latter .pdf assumes the MMU setup
> that's used on the "VideoCore" companion processor, and does not document
> physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
> addresses.

This had escaped me so far. I think we should put this into the device tree
so that the representation of devices in the .dts file matches the one in
the manual, like this

	vc-bus {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x20000000 0x7e000000 0x02000000>;

		other devices {

		};
	};


	Arnd



From arnd at arndb.de  Fri Sep 14 03:56:10 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Fri, 14 Sep 2012 07:56:10 +0000
Subject: [PATCH V4 5/5] ARM: bcm2835: instantiate console UART
In-Reply-To: <1347597684-30805-5-git-send-email-swarren@wwwdotorg.org>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
 <1347597684-30805-5-git-send-email-swarren@wwwdotorg.org>
Message-ID: <201209140756.10532.arnd@arndb.de>

On Friday 14 September 2012, Stephen Warren wrote:
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * s/bcm2708/bcm2835/.
> * Modified device tree vendor prefix.
> * Modified UART DT node to use a unit-address to create unique UART node
>   names, rather than using non-type names "uart0" and "uart1".
>   Note that UART 1 (the Broadcom "mini UART") is not yet present, but
>   I'm naming the DT node in anticipation that it will be added.
> 
> Signed-off-by: Chris Boot <bootc at bootc.net>
> Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix at gmail.com>
> Signed-off-by: Dom Cobley <dc4 at broadcom.com>
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>

Acked-by: Arnd Bergmann <arnd at arndb.de>


From swarren at wwwdotorg.org  Fri Sep 14 11:51:31 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Fri, 14 Sep 2012 09:51:31 -0600
Subject: [PATCH V4 1/5] ARM: add infra-structure for BCM2835 and Raspberry
 Pi
In-Reply-To: <201209140750.44039.arnd@arndb.de>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
 <201209140750.44039.arnd@arndb.de>
Message-ID: <50535283.9040905@wwwdotorg.org>

On 09/14/2012 01:50 AM, Arnd Bergmann wrote:
> On Friday 14 September 2012, Stephen Warren wrote:
>> From: Simon Arlott <simon at fire.lp0.eu>
>>
>> The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic
>> support for this SoC.
>>
>> http://www.broadcom.com/products/BCM2835
>> http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd
> 
> Just looked at that document. Funny how they actually put details about
> the kernel implementation (the static mapping address) into a hardware
> manual.

Yes. I keep hoping they'll fix this and re-issue the document. Dom, what
do you think that chances are of that?

>> Note that the documentation in the latter .pdf assumes the MMU setup
>> that's used on the "VideoCore" companion processor, and does not document
>> physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
>> addresses.
> 
> This had escaped me so far. I think we should put this into the device tree
> so that the representation of devices in the .dts file matches the one in
> the manual, like this
> 
> 	vc-bus {
> 		compatible = "simple-bus";
> 		#address-cells = <1>;
> 		#size-cells = <1>;
> 		ranges = <0x20000000 0x7e000000 0x02000000>;
> 
> 		other devices {
> 
> 		};
> 	};

I guess I can see the advantage of having the .dts reg values match the
documentation. I just worry that doing so is more about matching the
documentation rather than describing the true HW. Still, I suppose with
the ranges property, it's clear what the true physical addresses are..
It also introduces a completely fake bus just to perform the address
re-writing; I wonder if putting the ranges property at the top-level
node work instead?.

So  now that almost everything is ack'd, how should this get into the
tree - will you take (an updated version of) these patches and apply
them directly to arm-soc, or should I commit them and send a pull
request? (For the latter, I'd have to look up how to create a new k.org
git repo).

Thanks for the reviews.



From swarren at wwwdotorg.org  Sat Sep 15 02:23:35 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 15 Sep 2012 00:23:35 -0600
Subject: [PATCH] MAINTAINERS: add an entry for the BCM2835 ARM sub-architecture
Message-ID: <1347690215-17200-1-git-send-email-swarren@wwwdotorg.org>

Add myself as the maintainer for the BCM2835 ARM support, and related
drivers. This is mainly so that the MAINTAINERS file contains some
relevant entry, and the rpi/ARM mailing lists; I'd be quite happy if
anyone else came along and wanted to maintain/co-maintain this.

Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
Vince, can you confirm that the linux-rpi-kernel list is moderated for
non-subscribers?

Note that I cut down the individual to/cc entries when sending this patch,
since otherwise it doesn't get through to the rpi mailing list, and I
wanted to ensure this received coverage there.
---
 MAINTAINERS |   10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index fdc0119..988553e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1613,6 +1613,16 @@ L:	netdev at vger.kernel.org
 S:	Supported
 F:	drivers/net/ethernet/broadcom/bnx2x/
 
+BROADCOM BCM2835 ARM ARCHICTURE
+M:	Stephen Warren <swarren at wwwdotorg.org>
+L:	linux-rpi-kernel at lists.infradead.org (moderated for non-subscribers)
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi.git
+S:	Maintained
+F:	arch/arm/mach-bcm2835/
+F:	arch/arm/boot/dts/bcm2835*
+F:	arch/arm/configs/bcm2835_defconfig
+F:	drivers/*/*bcm2835*
+
 BROADCOM TG3 GIGABIT ETHERNET DRIVER
 M:	Matt Carlson <mcarlson at broadcom.com>
 M:	Michael Chan <mchan at broadcom.com>
-- 
1.7.9.5



From arnd at arndb.de  Fri Sep 14 16:01:33 2012
From: arnd at arndb.de (Arnd Bergmann)
Date: Fri, 14 Sep 2012 20:01:33 +0000
Subject: [PATCH V4 1/5] ARM: add infra-structure for BCM2835 and Raspberry
 Pi
In-Reply-To: <50535283.9040905@wwwdotorg.org>
References: <1347597684-30805-1-git-send-email-swarren@wwwdotorg.org>
 <201209140750.44039.arnd@arndb.de> <50535283.9040905@wwwdotorg.org>
Message-ID: <201209142001.33954.arnd@arndb.de>

On Friday 14 September 2012, Stephen Warren wrote:
> I guess I can see the advantage of having the .dts reg values match the
> documentation. I just worry that doing so is more about matching the
> documentation rather than describing the true HW. Still, I suppose with
> the ranges property, it's clear what the true physical addresses are..
> It also introduces a completely fake bus just to perform the address
> re-writing; I wonder if putting the ranges property at the top-level
> node work instead?.

I don't think it easily works with the reg property in the root.
Having a node for the "soc" components isn't all that unusual,
a bunch of other platforms do that.

The advantage is that we have something to conceptually group
all the on-chip components, and it works with the infrastructure
in drivers/base/soc.c.

> So  now that almost everything is ack'd, how should this get into the
> tree - will you take (an updated version of) these patches and apply
> them directly to arm-soc, or should I commit them and send a pull
> request? (For the latter, I'd have to look up how to create a new k.org
> git repo).

We can do whatever suits you best. Pull requests are slightly faster
to import. It's also ok if you use the linux-tegra git this time fi that
helps you.

	Arnd


From swarren at wwwdotorg.org  Sat Sep 15 02:21:33 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 15 Sep 2012 00:21:33 -0600
Subject: [PATCH V5 5/5] ARM: bcm2835: instantiate console UART
In-Reply-To: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347690093-16910-5-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Modified UART DT node to use a unit-address to create unique UART node
  names, rather than using non-type names "uart0" and "uart1".
  Note that UART 1 (the Broadcom "mini UART") is not yet present, but
  I'm naming the DT node in anticipation that it will be added.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd at arndb.de>
--
v5:
* Adjusted DT for ranges in /soc node.
v4:
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.
---
 arch/arm/boot/dts/bcm2835.dtsi |    9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index e7471d2..0b61939 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -6,7 +6,7 @@
 	interrupt-parent = <&intc>;
 
 	chosen {
-		bootargs = "earlyprintk";
+		bootargs = "earlyprintk console=ttyAMA0";
 	};
 
 	soc {
@@ -28,5 +28,12 @@
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
+
+		uart at 20201000 {
+			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+			reg = <0x7e201000 0x1000>;
+			interrupts = <2 25>;
+			clock-frequency = <3000000>;
+		};
 	};
 };
-- 
1.7.9.5



From swarren at wwwdotorg.org  Sat Sep 15 02:21:32 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 15 Sep 2012 00:21:32 -0600
Subject: [PATCH V5 4/5] ARM: bcm2835: add stub clock driver
In-Reply-To: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347690093-16910-4-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

This patch adds a minimal stub clock driver for the BCM2835. Its sole
purpose is to allow the PL011 AMBA clk_get() API calls to provide
something that looks enough like a clock that the driver probes and
operates correctly.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/clk/.
* Modified .dev_id for UART clocks to match UART DT node names.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Cc: Mike Turquette <mturquette at linaro.org>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
--
v5:
* No change.
v4:
* Moved implementation to drivers/clk/.
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.
---
 arch/arm/mach-bcm2835/bcm2835.c |    3 +++
 drivers/clk/Makefile            |    1 +
 drivers/clk/clk-bcm2835.c       |   52 +++++++++++++++++++++++++++++++++++++++
 include/linux/clk/bcm2835.h     |   24 ++++++++++++++++++
 4 files changed, 80 insertions(+)
 create mode 100644 drivers/clk/clk-bcm2835.c
 create mode 100644 include/linux/clk/bcm2835.h

diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index e3f2968..f6fea49 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -16,6 +16,7 @@
 #include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
 #include <linux/bcm2835_timer.h>
+#include <linux/clk/bcm2835.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -38,6 +39,8 @@ void __init bcm2835_init(void)
 {
 	int ret;
 
+	bcm2835_init_clocks();
+
 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
 				   NULL);
 	if (ret) {
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 5869ea3..d5c19d1 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
 obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed-rate.o clk-gate.o \
 				   clk-mux.o clk-divider.o clk-fixed-factor.o
 # SoCs specific
+obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
 obj-$(CONFIG_ARCH_NOMADIK)	+= clk-nomadik.o
 obj-$(CONFIG_ARCH_HIGHBANK)	+= clk-highbank.o
 obj-$(CONFIG_ARCH_MXS)		+= mxs/
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
new file mode 100644
index 0000000..148ac35
--- /dev/null
+++ b/drivers/clk/clk-bcm2835.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-private.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/bcm2835.h>
+
+/*
+ * These are fixed clocks (and device tree doesn't support clk!).
+ *
+ * They're probably not all root clocks and it may be possible to
+ * turn them on and off but until this is mapped out better it's
+ * the only way they can be used.
+ */
+DEFINE_CLK_FIXED_RATE(sys_pclk,   CLK_IS_ROOT, 250000000, 0);
+DEFINE_CLK_FIXED_RATE(apb_pclk,   CLK_IS_ROOT, 126000000, 0);
+DEFINE_CLK_FIXED_RATE(uart0_pclk, CLK_IS_ROOT,   3000000, 0);
+DEFINE_CLK_FIXED_RATE(uart1_pclk, CLK_IS_ROOT, 125000000, 0);
+
+static struct clk_lookup lookups[] = {
+	{ .con_id = "sys_pclk", .clk = &sys_pclk },
+	{ .con_id = "apb_pclk", .clk = &apb_pclk },
+	{ .dev_id = "20201000.uart", .clk = &uart0_pclk },
+	{ .dev_id = "20215000.uart", .clk = &uart1_pclk }
+};
+
+void __init bcm2835_init_clocks(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+		__clk_init(NULL, lookups[i].clk);
+		clkdev_add(&lookups[i]);
+	}
+}
diff --git a/include/linux/clk/bcm2835.h b/include/linux/clk/bcm2835.h
new file mode 100644
index 0000000..aa937f6
--- /dev/null
+++ b/include/linux/clk/bcm2835.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_CLK_BCM2835_H_
+#define __LINUX_CLK_BCM2835_H_
+
+void __init bcm2835_init_clocks(void);
+
+#endif
-- 
1.7.9.5



From swarren at wwwdotorg.org  Sat Sep 15 02:21:31 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 15 Sep 2012 00:21:31 -0600
Subject: [PATCH V5 3/5] ARM: bcm2835: add system timer
In-Reply-To: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347690093-16910-3-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The System Timer peripheral provides four 32-bit timer channels and a
single 64-bit free running counter. Each channel has an output compare
register, which is compared against the 32 least significant bits of the
free running counter values, and generates an interrupt.

Timer 3 is used as the Linux timer.

The BCM2835 also contains an SP804-based timer module. However, it
apparently has significant differences from the standard SP804 IP block,
and Broadcom's documentation recommends using the system timer instead.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved to drivers/clocksource/. This looks like the desired location for
  such code now.
* Added DT binding docs.
* Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more.
* Simplified bcm2835_time_init() to find one matching node and operate on
  it, rather than looping over all matching nodes. This seems more
  consistent with other clocksource code.
* Simplified bcm2835_time_init() using of_iomap().
* Renamed struct bcm2835_timer.index to match_mask to better represent its
  purpose.
* s/printk(PR_INFO/pr_info(/

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd at arndb.de>
---
v5:
* Adjusted DT for ranges in /soc node.
v4:
* Simplified bcm2835_time_init() using of_iomap().
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.
---
 .../bindings/timer/brcm,bcm2835-system-timer.txt   |   22 +++
 arch/arm/boot/dts/bcm2835.dtsi                     |    7 +
 arch/arm/mach-bcm2835/bcm2835.c                    |   10 +-
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/bcm2835_timer.c                |  161 ++++++++++++++++++++
 include/linux/bcm2835_timer.h                      |   22 +++
 6 files changed, 214 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
 create mode 100644 drivers/clocksource/bcm2835_timer.c
 create mode 100644 include/linux/bcm2835_timer.h

diff --git a/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt b/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
new file mode 100644
index 0000000..a0b727f
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
@@ -0,0 +1,22 @@
+BCM2835 System Timer
+
+The System Timer peripheral provides four 32-bit timer channels and a
+single 64-bit free running counter. Each channel has an output compare
+register, which is compared against the 32 least significant bits of the
+free running counter values, and generates an interrupt.
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-system-timer.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 4 interrupt sinks; one per timer channel.
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+	compatible = "brcm,bcm2835-system-timer";
+	reg = <0x20003000 0x1000>;
+	interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+	clock-frequency = <1000000>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 8842d75..e7471d2 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -15,6 +15,13 @@
 		#size-cells = <1>;
 		ranges = <0x7e000000 0x20000000 0x02000000>;
 
+		timer {
+			compatible = "brcm,bcm2835-system-timer";
+			reg = <0x7e003000 0x1000>;
+			interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+			clock-frequency = <1000000>;
+		};
+
 		intc: interrupt-controller {
 			compatible = "brcm,bcm2835-armctrl-ic";
 			reg = <0x7e00b200 0x200>;
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index 72c4b5f..e3f2968 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -15,10 +15,10 @@
 #include <linux/init.h>
 #include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
+#include <linux/bcm2835_timer.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/time.h>
 
 #include <mach/bcm2835_soc.h>
 
@@ -46,14 +46,6 @@ void __init bcm2835_init(void)
 	}
 }
 
-static void __init bcm2835_timer_init(void)
-{
-}
-
-struct sys_timer bcm2835_timer = {
-	.init = bcm2835_timer_init
-};
-
 static const char * const bcm2835_compat[] = {
 	"brcm,bcm2835",
 	NULL
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index b65d0c5..d496a55 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_DW_APB_TIMER)	+= dw_apb_timer.o
 obj-$(CONFIG_DW_APB_TIMER_OF)	+= dw_apb_timer_of.o
 obj-$(CONFIG_CLKSRC_DBX500_PRCMU)	+= clksrc-dbx500-prcmu.o
 obj-$(CONFIG_ARMADA_370_XP_TIMER)	+= time-armada-370-xp.o
+obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835_timer.o
diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c
new file mode 100644
index 0000000..bc19f12
--- /dev/null
+++ b/drivers/clocksource/bcm2835_timer.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/bcm2835_timer.h>
+#include <linux/bitops.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/interrupt.h>
+#include <linux/irqreturn.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+
+#include <asm/sched_clock.h>
+#include <asm/irq.h>
+
+#define REG_CONTROL	0x00
+#define REG_COUNTER_LO	0x04
+#define REG_COUNTER_HI	0x08
+#define REG_COMPARE(n)	(0x0c + (n) * 4)
+#define MAX_TIMER	3
+#define DEFAULT_TIMER	3
+
+struct bcm2835_timer {
+	void __iomem *control;
+	void __iomem *compare;
+	int match_mask;
+	struct clock_event_device evt;
+	struct irqaction act;
+};
+
+static void __iomem *system_clock __read_mostly;
+
+static u32 notrace bcm2835_sched_read(void)
+{
+	return readl_relaxed(system_clock);
+}
+
+static void bcm2835_time_set_mode(enum clock_event_mode mode,
+	struct clock_event_device *evt_dev)
+{
+	switch (mode) {
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
+		break;
+	default:
+		WARN(1, "%s: unhandled event mode %d\n", __func__, mode);
+		break;
+	}
+}
+
+static int bcm2835_time_set_next_event(unsigned long event,
+	struct clock_event_device *evt_dev)
+{
+	struct bcm2835_timer *timer = container_of(evt_dev,
+		struct bcm2835_timer, evt);
+	writel_relaxed(readl_relaxed(system_clock) + event,
+		timer->compare);
+	return 0;
+}
+
+static irqreturn_t bcm2835_time_interrupt(int irq, void *dev_id)
+{
+	struct bcm2835_timer *timer = dev_id;
+	void (*event_handler)(struct clock_event_device *);
+	if (readl_relaxed(timer->control) & timer->match_mask) {
+		writel_relaxed(timer->match_mask, timer->control);
+
+		event_handler = ACCESS_ONCE(timer->evt.event_handler);
+		if (event_handler)
+			event_handler(&timer->evt);
+		return IRQ_HANDLED;
+	} else {
+		return IRQ_NONE;
+	}
+}
+
+static struct of_device_id bcm2835_time_match[] __initconst = {
+	{ .compatible = "brcm,bcm2835-system-timer" },
+	{}
+};
+
+static void __init bcm2835_time_init(void)
+{
+	struct device_node *node;
+	void __iomem *base;
+	u32 freq;
+	int irq;
+	struct bcm2835_timer *timer;
+
+	node = of_find_matching_node(NULL, bcm2835_time_match);
+	if (!node)
+		panic("No bcm2835 timer node");
+
+	base = of_iomap(node, 0);
+	if (!base)
+		panic("Can't remap registers");
+
+	if (of_property_read_u32(node, "clock-frequency", &freq))
+		panic("Can't read clock-frequency");
+
+	system_clock = base + REG_COUNTER_LO;
+	setup_sched_clock(bcm2835_sched_read, 32, freq);
+
+	clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
+		freq, 300, 32, clocksource_mmio_readl_up);
+
+	irq = irq_of_parse_and_map(node, DEFAULT_TIMER);
+	if (irq <= 0)
+		panic("Can't parse IRQ");
+
+	timer = kzalloc(sizeof(*timer), GFP_KERNEL);
+	if (!timer)
+		panic("Can't allocate timer struct\n");
+
+	timer->control = base + REG_CONTROL;
+	timer->compare = base + REG_COMPARE(DEFAULT_TIMER);
+	timer->match_mask = BIT(DEFAULT_TIMER);
+	timer->evt.name = node->name;
+	timer->evt.rating = 300;
+	timer->evt.features = CLOCK_EVT_FEAT_ONESHOT;
+	timer->evt.set_mode = bcm2835_time_set_mode;
+	timer->evt.set_next_event = bcm2835_time_set_next_event;
+	timer->evt.cpumask = cpumask_of(0);
+	timer->act.name = node->name;
+	timer->act.flags = IRQF_TIMER | IRQF_SHARED;
+	timer->act.dev_id = timer;
+	timer->act.handler = bcm2835_time_interrupt;
+
+	if (setup_irq(irq, &timer->act))
+		panic("Can't set up timer IRQ\n");
+
+	clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
+
+	pr_info("bcm2835: system timer (irq = %d)\n", irq);
+}
+
+struct sys_timer bcm2835_timer = {
+	.init = bcm2835_time_init,
+};
diff --git a/include/linux/bcm2835_timer.h b/include/linux/bcm2835_timer.h
new file mode 100644
index 0000000..25680fe
--- /dev/null
+++ b/include/linux/bcm2835_timer.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2012 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BCM2835_TIMER_H
+#define __BCM2835_TIMER_H
+
+#include <asm/mach/time.h>
+
+extern struct sys_timer bcm2835_timer;
+
+#endif
-- 
1.7.9.5



From swarren at wwwdotorg.org  Sat Sep 15 02:21:30 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 15 Sep 2012 00:21:30 -0600
Subject: [PATCH V5 2/5] ARM: bcm2835: add interrupt controller driver
In-Reply-To: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1347690093-16910-2-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The BCM2835 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/irchip/.
* Added devicetree documentation, and hence removed list of IRQs from
  bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
  the size of the hwirq space, and pass the total size of the hwirq space
  to irq_domain_add_linear(), rather than just the number of valid hwirqs;
  the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
  rather than nesting it inside a /axi node. Hence, changed the reg value
  since /axi had a ranges property. This seems simpler to me, but I'm not
  sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
  removing the need to patch include/linux/irqdomain.h or
  kernel/irq/irqdomain.c.
* Simplified armctrl_of_init() using of_iomap().
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
  controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd at arndb.de>
--
v5:
* Adjusted DT for ranges in /soc node.
v4:
* Moved IRQ driver to drivers/irqchip/.
* Simplified armctrl_of_init() using of_iomap().
* Moved binding into Documentation/devicetree/bindings/interrupt-controller/.
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.
---
 .../brcm,bcm2835-armctrl-ic.txt                    |  110 ++++++++++
 arch/arm/boot/dts/bcm2835.dtsi                     |    8 +
 arch/arm/mach-bcm2835/bcm2835.c                    |   10 +-
 drivers/Kconfig                                    |    2 +
 drivers/Makefile                                   |    2 +
 drivers/irqchip/Makefile                           |    1 +
 drivers/irqchip/irq-bcm2835.c                      |  223 ++++++++++++++++++++
 include/linux/irqchip/bcm2835.h                    |   29 +++
 8 files changed, 376 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
 create mode 100644 drivers/irqchip/Kconfig
 create mode 100644 drivers/irqchip/Makefile
 create mode 100644 drivers/irqchip/irq-bcm2835.c
 create mode 100644 include/linux/irqchip/bcm2835.h

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
new file mode 100644
index 0000000..7bcf2f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
@@ -0,0 +1,110 @@
+BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
+
+The BCM2835 contains a custom top-level interrupt controller, which supports
+72 interrupt sources using a 2-level register scheme. The interrupt
+controller, or the HW block containing it, is referred to occasionally
+as "armctrl" in the SoC documentation, hence naming of this binding.
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-armctrl-ic.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 2.
+
+  The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic
+  pending" register, or 1/2 respectively for interrupts in the "IRQ pending
+  1/2" register.
+
+  The 2nd cell contains the interrupt number within the bank. Valid values
+  are 0..7 for bank 0, and 0..31 for bank 1.
+
+The interrupt sources are as follows:
+
+Bank 0:
+0: ARM_TIMER
+1: ARM_MAILBOX
+2: ARM_DOORBELL_0
+3: ARM_DOORBELL_1
+4: VPU0_HALTED
+5: VPU1_HALTED
+6: ILLEGAL_TYPE0
+7: ILLEGAL_TYPE1
+
+Bank 1:
+0: TIMER0
+1: TIMER1
+2: TIMER2
+3: TIMER3
+4: CODEC0
+5: CODEC1
+6: CODEC2
+7: VC_JPEG
+8: ISP
+9: VC_USB
+10: VC_3D
+11: TRANSPOSER
+12: MULTICORESYNC0
+13: MULTICORESYNC1
+14: MULTICORESYNC2
+15: MULTICORESYNC3
+16: DMA0
+17: DMA1
+18: VC_DMA2
+19: VC_DMA3
+20: DMA4
+21: DMA5
+22: DMA6
+23: DMA7
+24: DMA8
+25: DMA9
+26: DMA10
+27: DMA11
+28: DMA12
+29: AUX
+30: ARM
+31: VPUDMA
+
+Bank 2:
+0: HOSTPORT
+1: VIDEOSCALER
+2: CCP2TX
+3: SDC
+4: DSI0
+5: AVE
+6: CAM0
+7: CAM1
+8: HDMI0
+9: HDMI1
+10: PIXELVALVE1
+11: I2CSPISLV
+12: DSI1
+13: PWA0
+14: PWA1
+15: CPR
+16: SMI
+17: GPIO0
+18: GPIO1
+19: GPIO2
+20: GPIO3
+21: VC_I2C
+22: VC_SPI
+23: VC_I2SPCM
+24: VC_SDIO
+25: VC_UART
+26: SLIMBUS
+27: VEC
+28: CPG
+29: RNG
+30: VC_ARASANSDIO
+31: AVSPMON
+
+Example:
+
+intc: interrupt-controller {
+	compatible = "brcm,bcm2835-armctrl-ic";
+	reg = <0x2000b200 0x200>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index a31cb40..8842d75 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -3,6 +3,7 @@
 / {
 	compatible = "brcm,bcm2835";
 	model = "BCM2835";
+	interrupt-parent = <&intc>;
 
 	chosen {
 		bootargs = "earlyprintk";
@@ -13,5 +14,12 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x7e000000 0x20000000 0x02000000>;
+
+		intc: interrupt-controller {
+			compatible = "brcm,bcm2835-armctrl-ic";
+			reg = <0x7e00b200 0x200>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
 	};
 };
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index f6b36b4..72c4b5f 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -13,12 +13,12 @@
  */
 
 #include <linux/init.h>
+#include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
-#include <asm/exception.h>
 
 #include <mach/bcm2835_soc.h>
 
@@ -34,14 +34,6 @@ void __init bcm2835_map_io(void)
 	iotable_init(&io_map, 1);
 }
 
-void __init bcm2835_init_irq(void)
-{
-}
-
-asmlinkage void __exception_irq_entry bcm2835_handle_irq(struct pt_regs *regs)
-{
-}
-
 void __init bcm2835_init(void)
 {
 	int ret;
diff --git a/drivers/Kconfig b/drivers/Kconfig
index ece958d..36d3daa 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -152,4 +152,6 @@ source "drivers/vme/Kconfig"
 
 source "drivers/pwm/Kconfig"
 
+source "drivers/irqchip/Kconfig"
+
 endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index 5b42184..8c30e73 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -5,6 +5,8 @@
 # Rewritten to use lists instead of if-statements.
 #
 
+obj-y				+= irqchip/
+
 # GPIO must come after pinctrl as gpios may need to mux pins etc
 obj-y				+= pinctrl/
 obj-y				+= gpio/
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
new file mode 100644
index 0000000..e69de29
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
new file mode 100644
index 0000000..054321d
--- /dev/null
+++ b/drivers/irqchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c
new file mode 100644
index 0000000..dc670cc
--- /dev/null
+++ b/drivers/irqchip/irq-bcm2835.c
@@ -0,0 +1,223 @@
+/*
+ * Copyright 2010 Broadcom
+ * Copyright 2012 Simon Arlott, Chris Boot, Stephen Warren
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Quirk 1: Shortcut interrupts don't set the bank 1/2 register pending bits
+ *
+ * If an interrupt fires on bank 1 that isn't in the shortcuts list, bit 8
+ * on bank 0 is set to signify that an interrupt in bank 1 has fired, and
+ * to look in the bank 1 status register for more information.
+ *
+ * If an interrupt fires on bank 1 that _is_ in the shortcuts list, its
+ * shortcut bit in bank 0 is set as well as its interrupt bit in the bank 1
+ * status register, but bank 0 bit 8 is _not_ set.
+ *
+ * Quirk 2: You can't mask the register 1/2 pending interrupts
+ *
+ * In a proper cascaded interrupt controller, the interrupt lines with
+ * cascaded interrupt controllers on them are just normal interrupt lines.
+ * You can mask the interrupts and get on with things. With this controller
+ * you can't do that.
+ *
+ * Quirk 3: The shortcut interrupts can't be (un)masked in bank 0
+ *
+ * Those interrupts that have shortcuts can only be masked/unmasked in
+ * their respective banks' enable/disable registers. Doing so in the bank 0
+ * enable/disable registers has no effect.
+ *
+ * The FIQ control register:
+ *  Bits 0-6: IRQ (index in order of interrupts from banks 1, 2, then 0)
+ *  Bit    7: Enable FIQ generation
+ *  Bits  8+: Unused
+ *
+ * An interrupt must be disabled before configuring it for FIQ generation
+ * otherwise both handlers will fire at the same time!
+ */
+
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/irqchip/bcm2835.h>
+
+#include <asm/exception.h>
+
+/* Put the bank and irq (32 bits) into the hwirq */
+#define MAKE_HWIRQ(b, n)	((b << 5) | (n))
+#define HWIRQ_BANK(i)		(i >> 5)
+#define HWIRQ_BIT(i)		BIT(i & 0x1f)
+
+#define NR_IRQS_BANK0		8
+#define BANK0_HWIRQ_MASK	0xff
+/* Shortcuts can't be disabled so any unknown new ones need to be masked */
+#define SHORTCUT1_MASK		0x00007c00
+#define SHORTCUT2_MASK		0x001f8000
+#define SHORTCUT_SHIFT		10
+#define BANK1_HWIRQ		BIT(8)
+#define BANK2_HWIRQ		BIT(9)
+#define BANK0_VALID_MASK	(BANK0_HWIRQ_MASK | BANK1_HWIRQ | BANK2_HWIRQ \
+					| SHORTCUT1_MASK | SHORTCUT2_MASK)
+
+#define REG_FIQ_CONTROL		0x0c
+
+#define NR_BANKS		3
+#define IRQS_PER_BANK		32
+
+static int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
+static int reg_enable[] __initconst = { 0x18, 0x10, 0x14 };
+static int reg_disable[] __initconst = { 0x24, 0x1c, 0x20 };
+static int bank_irqs[] __initconst = { 8, 32, 32 };
+
+static const int shortcuts[] = {
+	7, 9, 10, 18, 19,		/* Bank 1 */
+	21, 22, 23, 24, 25, 30		/* Bank 2 */
+};
+
+struct armctrl_ic {
+	void __iomem *base;
+	void __iomem *pending[NR_BANKS];
+	void __iomem *enable[NR_BANKS];
+	void __iomem *disable[NR_BANKS];
+	struct irq_domain *domain;
+};
+
+static struct armctrl_ic intc __read_mostly;
+
+static void armctrl_mask_irq(struct irq_data *d)
+{
+	writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]);
+}
+
+static void armctrl_unmask_irq(struct irq_data *d)
+{
+	writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]);
+}
+
+static struct irq_chip armctrl_chip = {
+	.name = "ARMCTRL-level",
+	.irq_mask = armctrl_mask_irq,
+	.irq_unmask = armctrl_unmask_irq
+};
+
+static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr,
+	const u32 *intspec, unsigned int intsize,
+	unsigned long *out_hwirq, unsigned int *out_type)
+{
+	if (WARN_ON(intsize != 2))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[0] >= NR_BANKS))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[1] >= IRQS_PER_BANK))
+		return -EINVAL;
+
+	if (WARN_ON(intspec[0] == 0 && intspec[1] >= NR_IRQS_BANK0))
+		return -EINVAL;
+
+	*out_hwirq = MAKE_HWIRQ(intspec[0], intspec[1]);
+	*out_type = IRQ_TYPE_NONE;
+	return 0;
+}
+
+static struct irq_domain_ops armctrl_ops = {
+	.xlate = armctrl_xlate
+};
+
+static int __init armctrl_of_init(struct device_node *node,
+	struct device_node *parent)
+{
+	void __iomem *base;
+	int irq, b, i;
+
+	base = of_iomap(node, 0);
+	if (!base)
+		panic("%s: unable to map IC registers\n",
+			node->full_name);
+
+	intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0),
+			&armctrl_ops, NULL);
+	if (!intc.domain)
+		panic("%s: unable to create IRQ domain\n", node->full_name);
+
+	for (b = 0; b < NR_BANKS; b++) {
+		intc.pending[b] = base + reg_pending[b];
+		intc.enable[b] = base + reg_enable[b];
+		intc.disable[b] = base + reg_disable[b];
+
+		for (i = 0; i < bank_irqs[b]; i++) {
+			irq = irq_create_mapping(intc.domain, MAKE_HWIRQ(b, i));
+			BUG_ON(irq <= 0);
+			irq_set_chip_and_handler(irq, &armctrl_chip,
+				handle_level_irq);
+			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+		}
+	}
+	return 0;
+}
+
+static struct of_device_id irq_of_match[] __initconst = {
+	{ .compatible = "brcm,bcm2835-armctrl-ic", .data = armctrl_of_init }
+};
+
+void __init bcm2835_init_irq(void)
+{
+	of_irq_init(irq_of_match);
+}
+
+/*
+ * Handle each interrupt across the entire interrupt controller.  This reads the
+ * status register before handling each interrupt, which is necessary given that
+ * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
+ */
+
+static void armctrl_handle_bank(int bank, struct pt_regs *regs)
+{
+	u32 stat, irq;
+
+	while ((stat = readl_relaxed(intc.pending[bank]))) {
+		irq = MAKE_HWIRQ(bank, ffs(stat) - 1);
+		handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+	}
+}
+
+static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,
+	u32 stat)
+{
+	u32 irq = MAKE_HWIRQ(bank, shortcuts[ffs(stat >> SHORTCUT_SHIFT) - 1]);
+	handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+}
+
+asmlinkage void __exception_irq_entry bcm2835_handle_irq(
+	struct pt_regs *regs)
+{
+	u32 stat, irq;
+
+	while ((stat = readl_relaxed(intc.pending[0]) & BANK0_VALID_MASK)) {
+		if (stat & BANK0_HWIRQ_MASK) {
+			irq = MAKE_HWIRQ(0, ffs(stat & BANK0_HWIRQ_MASK) - 1);
+			handle_IRQ(irq_linear_revmap(intc.domain, irq), regs);
+		} else if (stat & SHORTCUT1_MASK) {
+			armctrl_handle_shortcut(1, regs, stat & SHORTCUT1_MASK);
+		} else if (stat & SHORTCUT2_MASK) {
+			armctrl_handle_shortcut(2, regs, stat & SHORTCUT2_MASK);
+		} else if (stat & BANK1_HWIRQ) {
+			armctrl_handle_bank(1, regs);
+		} else if (stat & BANK2_HWIRQ) {
+			armctrl_handle_bank(2, regs);
+		} else {
+			BUG();
+		}
+	}
+}
diff --git a/include/linux/irqchip/bcm2835.h b/include/linux/irqchip/bcm2835.h
new file mode 100644
index 0000000..48a859b
--- /dev/null
+++ b/include/linux/irqchip/bcm2835.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_IRQCHIP_BCM2835_H_
+#define __LINUX_IRQCHIP_BCM2835_H_
+
+#include <asm/exception.h>
+
+extern void bcm2835_init_irq(void);
+
+extern asmlinkage void __exception_irq_entry bcm2835_handle_irq(
+	struct pt_regs *regs);
+
+#endif
-- 
1.7.9.5



From swarren at wwwdotorg.org  Sat Sep 15 02:21:29 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 15 Sep 2012 00:21:29 -0600
Subject: [PATCH V5 1/5] ARM: add infra-structure for BCM2835 and Raspberry Pi
Message-ID: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic
support for this SoC.

http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pd

Note that the documentation in the latter .pdf assumes the MMU setup
that's used on the "VideoCore" companion processor, and does not document
physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
addresses. This is accounted for by the ranges property in the /soc node
in the device tree.

The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
minimal device tree for this board; enough to see some very early kernel
boot messages through earlyprintk. However, this patch does not yet
provide a useful booting system.

http://www.raspberrypi.org/.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split from 3-4 months ago, and significantly stripped down and
modified since.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd at arndb.de>
---
Arnd, I've created a linux-rpi.git on kernel.org, so can send a pull
request. I'm just waiting for Mike or you to ack patch 4; the clock
driver.

v5:
* Added DT /soc node with a ranges property to adjust for the physical/
  virtual address discrepancy in the SoC documentation.
* Rebased the series onto v3.6-rc5; was previously on linux-next. Only
  trivial context changes.
v4:
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix from broadcom to brcm.
* Document device tree vendor prefix.
* Added VFP (Kconfig help says one must be selected) and EABI (to match
  binaries produced by RPi toolchains, so user-space works) to defconfig.
v3:
* Added DT binding documentation for the SoC itself.
* Changed patch subject from "support" to "infra-structure", and added
  to the commit description, to indicate that the patch isn't adding
  complete support for the SoC/board.
* Added all S-o-b tags from downstream, now that I have permission to
  fix them up to be valid.
* Changed patch author to Simon Arlott, now I have permission to change
  his email address to something valid.
* Limited my (c) additions to files I created; the other changes turnd
  out to be trivial.
v2:
* Rename *_BASE to *_PHYS to match Simon's rpi-split branch.
* Remove #define UART_BAUD since it isn't used.
* Don't select WATCHDOG from ARCH_BCM2835
* Remove 8250 and PL010 serial ports from bcm2835_defconfig
* Remove <mach/hardware.h>
* Rename common.c back to bcm2835.c; matches downstream and is
  preferred naming style.
---
 Documentation/devicetree/bindings/arm/bcm2835.txt  |    8 ++
 .../devicetree/bindings/vendor-prefixes.txt        |    1 +
 arch/arm/Kconfig                                   |   17 ++++
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/bcm2835-rpi-b.dts                |   12 +++
 arch/arm/boot/dts/bcm2835.dtsi                     |   17 ++++
 arch/arm/configs/bcm2835_defconfig                 |   95 ++++++++++++++++++++
 arch/arm/mach-bcm2835/Makefile                     |    1 +
 arch/arm/mach-bcm2835/Makefile.boot                |    5 ++
 arch/arm/mach-bcm2835/bcm2835.c                    |   77 ++++++++++++++++
 arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h   |   29 ++++++
 arch/arm/mach-bcm2835/include/mach/debug-macro.S   |   21 +++++
 arch/arm/mach-bcm2835/include/mach/timex.h         |   26 ++++++
 arch/arm/mach-bcm2835/include/mach/uncompress.h    |   45 ++++++++++
 14 files changed, 355 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2835.txt
 create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2835.dtsi
 create mode 100644 arch/arm/configs/bcm2835_defconfig
 create mode 100644 arch/arm/mach-bcm2835/Makefile
 create mode 100644 arch/arm/mach-bcm2835/Makefile.boot
 create mode 100644 arch/arm/mach-bcm2835/bcm2835.c
 create mode 100644 arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h
 create mode 100644 arch/arm/mach-bcm2835/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-bcm2835/include/mach/timex.h
 create mode 100644 arch/arm/mach-bcm2835/include/mach/uncompress.h

diff --git a/Documentation/devicetree/bindings/arm/bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm2835.txt
new file mode 100644
index 0000000..ac68348
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm2835.txt
@@ -0,0 +1,8 @@
+Broadcom BCM2835 device tree bindings
+-------------------------------------------
+
+Boards with the BCM2835 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "brcm,bcm2835";
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index db4d3af..4f293e5 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -10,6 +10,7 @@ apm	Applied Micro Circuits Corporation (APM)
 arm	ARM Ltd.
 atmel	Atmel Corporation
 bosch	Bosch Sensortec GmbH
+brcm	Broadcom Corporation
 cavium	Cavium, Inc.
 chrp	Common Hardware Reference Platform
 cortina	Cortina Systems, Inc.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2f88d8d..6524497 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -350,6 +350,23 @@ config ARCH_AT91
 	  This enables support for systems based on Atmel
 	  AT91RM9200 and AT91SAM9* processors.
 
+config ARCH_BCM2835
+	bool "Broadcom BCM2835 family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_ERRATA_411920
+	select ARM_TIMER_SP804
+	select CLKDEV_LOOKUP
+	select COMMON_CLK
+	select CPU_V6
+	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  This enables support for the Broadcom BCM2835 SoC. This SoC is
+	  use in the Raspberry Pi, and Roku 2 devices.
+
 config ARCH_BCMRING
 	bool "Broadcom BCMRING"
 	depends on MMU
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 30eae87..17b0d5f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -136,6 +136,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)		:= at91
+machine-$(CONFIG_ARCH_BCM2835)		:= bcm2835
 machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)		:= cns3xxx
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
new file mode 100644
index 0000000..7dd860f
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/memreserve/ 0x0c000000 0x04000000;
+/include/ "bcm2835.dtsi"
+
+/ {
+	compatible = "raspberrypi,model-b", "brcm,bcm2835";
+	model = "Raspberry Pi Model B";
+
+	memory {
+		reg = <0 0x10000000>;
+	};
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
new file mode 100644
index 0000000..a31cb40
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -0,0 +1,17 @@
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm2835";
+	model = "BCM2835";
+
+	chosen {
+		bootargs = "earlyprintk";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x7e000000 0x20000000 0x02000000>;
+	};
+};
diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig
new file mode 100644
index 0000000..7aea702
--- /dev/null
+++ b/arch/arm/configs/bcm2835_defconfig
@@ -0,0 +1,95 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_JUMP_LABEL=y
+# CONFIG_BLOCK is not set
+CONFIG_ARCH_BCM2835=y
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_AEABI=y
+CONFIG_COMPACTION=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_CLEANCACHE=y
+CONFIG_SECCOMP=y
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+CONFIG_VFP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_TTY_PRINTK=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_PRINTK_TIME=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_BOOT_PRINTK_DELAY=y
+CONFIG_SCHED_TRACER=y
+CONFIG_STACK_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_KGDB=y
+CONFIG_KGDB_KDB=y
+CONFIG_TEST_KSTRTOX=y
+CONFIG_STRICT_DEVMEM=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
diff --git a/arch/arm/mach-bcm2835/Makefile b/arch/arm/mach-bcm2835/Makefile
new file mode 100644
index 0000000..4c3892f
--- /dev/null
+++ b/arch/arm/mach-bcm2835/Makefile
@@ -0,0 +1 @@
+obj-y += bcm2835.o
diff --git a/arch/arm/mach-bcm2835/Makefile.boot b/arch/arm/mach-bcm2835/Makefile.boot
new file mode 100644
index 0000000..0831fd1
--- /dev/null
+++ b/arch/arm/mach-bcm2835/Makefile.boot
@@ -0,0 +1,5 @@
+   zreladdr-y := 0x00008000
+params_phys-y := 0x00000100
+initrd_phys-y := 0x00800000
+
+dtb-y += bcm2835-rpi-b.dtb
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
new file mode 100644
index 0000000..f6b36b4
--- /dev/null
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/exception.h>
+
+#include <mach/bcm2835_soc.h>
+
+static struct map_desc io_map __initdata = {
+	.virtual = BCM2835_PERIPH_VIRT,
+	.pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),
+	.length = BCM2835_PERIPH_SIZE,
+	.type = MT_DEVICE
+};
+
+void __init bcm2835_map_io(void)
+{
+	iotable_init(&io_map, 1);
+}
+
+void __init bcm2835_init_irq(void)
+{
+}
+
+asmlinkage void __exception_irq_entry bcm2835_handle_irq(struct pt_regs *regs)
+{
+}
+
+void __init bcm2835_init(void)
+{
+	int ret;
+
+	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
+				   NULL);
+	if (ret) {
+		pr_err("of_platform_populate failed: %d\n", ret);
+		BUG();
+	}
+}
+
+static void __init bcm2835_timer_init(void)
+{
+}
+
+struct sys_timer bcm2835_timer = {
+	.init = bcm2835_timer_init
+};
+
+static const char * const bcm2835_compat[] = {
+	"brcm,bcm2835",
+	NULL
+};
+
+DT_MACHINE_START(BCM2835, "BCM2835")
+	.map_io = bcm2835_map_io,
+	.init_irq = bcm2835_init_irq,
+	.handle_irq = bcm2835_handle_irq,
+	.init_machine = bcm2835_init,
+	.timer = &bcm2835_timer,
+	.dt_compat = bcm2835_compat
+MACHINE_END
diff --git a/arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h b/arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h
new file mode 100644
index 0000000..d4dfcf7
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * Derived from code:
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_BCM2835_BCM2835_SOC_H__
+#define __MACH_BCM2835_BCM2835_SOC_H__
+
+#include <asm/sizes.h>
+
+#define BCM2835_PERIPH_PHYS	0x20000000
+#define BCM2835_PERIPH_VIRT	0xf0000000
+#define BCM2835_PERIPH_SIZE	SZ_16M
+#define BCM2835_DEBUG_PHYS	0x20201000
+#define BCM2835_DEBUG_VIRT	0xf0201000
+
+#endif
diff --git a/arch/arm/mach-bcm2835/include/mach/debug-macro.S b/arch/arm/mach-bcm2835/include/mach/debug-macro.S
new file mode 100644
index 0000000..8a161e4
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/debug-macro.S
@@ -0,0 +1,21 @@
+/*
+ * Debugging macro include header
+ *
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <mach/bcm2835_soc.h>
+
+	.macro	addruart, rp, rv, tmp
+	ldr	\rp, =BCM2835_DEBUG_PHYS
+	ldr	\rv, =BCM2835_DEBUG_VIRT
+	.endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-bcm2835/include/mach/timex.h b/arch/arm/mach-bcm2835/include/mach/timex.h
new file mode 100644
index 0000000..6d021e1
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/timex.h
@@ -0,0 +1,26 @@
+/*
+ *  BCM2835 system clock frequency
+ *
+ *  Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+#define CLOCK_TICK_RATE		(1000000)
+
+#endif
diff --git a/arch/arm/mach-bcm2835/include/mach/uncompress.h b/arch/arm/mach-bcm2835/include/mach/uncompress.h
new file mode 100644
index 0000000..cc46dcc
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/uncompress.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/amba/serial.h>
+#include <mach/bcm2835_soc.h>
+
+#define UART0_BASE BCM2835_DEBUG_PHYS
+
+#define BCM2835_UART_DR IOMEM(UART0_BASE + UART01x_DR)
+#define BCM2835_UART_FR IOMEM(UART0_BASE + UART01x_FR)
+#define BCM2835_UART_CR IOMEM(UART0_BASE + UART011_CR)
+
+static inline void putc(int c)
+{
+	while (__raw_readl(BCM2835_UART_FR) & UART01x_FR_TXFF)
+		barrier();
+
+	__raw_writel(c, BCM2835_UART_DR);
+}
+
+static inline void flush(void)
+{
+	int fr;
+
+	do {
+		fr = __raw_readl(BCM2835_UART_FR);
+		barrier();
+	} while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE);
+}
+
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
-- 
1.7.9.5



From swarren at wwwdotorg.org  Sat Sep 15 13:12:40 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 15 Sep 2012 11:12:40 -0600
Subject: [PATCH V5 2/5] ARM: bcm2835: add interrupt controller driver
In-Reply-To: <20120915094543.GH12245@n2100.arm.linux.org.uk>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
 <1347690093-16910-2-git-send-email-swarren@wwwdotorg.org>
 <20120915094543.GH12245@n2100.arm.linux.org.uk>
Message-ID: <5054B708.5050005@wwwdotorg.org>

On 09/15/2012 03:45 AM, Russell King - ARM Linux wrote:
> On Sat, Sep 15, 2012 at 12:21:30AM -0600, Stephen Warren wrote:
>> +static struct irq_chip armctrl_chip = {
>> +	.name = "ARMCTRL-level",
>> +	.irq_mask = armctrl_mask_irq,
>> +	.irq_unmask = armctrl_unmask_irq
>> +};
> 
> Might we want to enable CONFIG_GENERIC_IRQ_SHOW_LEVEL ?

That sounds like a good idea. I'll patch that in locally without
reposting unless anyone has an objection to this.



From olof at lixom.net  Sat Sep 15 20:34:50 2012
From: olof at lixom.net (Olof Johansson)
Date: Sat, 15 Sep 2012 17:34:50 -0700
Subject: [PATCH V3 1/5] ARM: add infra-structure for BCM2708/BCM2835 and
 Raspberry Pi
In-Reply-To: <50529382.6000605@wwwdotorg.org>
References: <1347423509-30647-1-git-send-email-swarren@wwwdotorg.org>
 <20120913195125.GA4240@raptus.dandreoli.com>
 <50529382.6000605@wwwdotorg.org>
Message-ID: <20120916003450.GC7028@quad.lixom.net>

On Thu, Sep 13, 2012 at 08:16:34PM -0600, Stephen Warren wrote:
> > BTW is it possible to change it to "bcm"?
> 
> I believe standard practice is to use the stock ticker symbol if not
> using the full company name, so that'd be "brcm". Does anyone have an
> objection? I'll assume not and make the change...

Yeah, "brcm," is the appropriate prefix in this case.


-Olof


From swarren at wwwdotorg.org  Sat Sep 15 21:40:04 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Sat, 15 Sep 2012 19:40:04 -0600
Subject: [PATCH V5 2/5] ARM: bcm2835: add interrupt controller driver
In-Reply-To: <20120915183338.GJ12245@n2100.arm.linux.org.uk>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
 <1347690093-16910-2-git-send-email-swarren@wwwdotorg.org>
 <20120915094543.GH12245@n2100.arm.linux.org.uk>
 <5054B708.5050005@wwwdotorg.org>
 <20120915183338.GJ12245@n2100.arm.linux.org.uk>
Message-ID: <50552DF4.5090906@wwwdotorg.org>

On 09/15/2012 12:33 PM, Russell King - ARM Linux wrote:
> On Sat, Sep 15, 2012 at 11:12:40AM -0600, Stephen Warren wrote:
>> On 09/15/2012 03:45 AM, Russell King - ARM Linux wrote:
>>> On Sat, Sep 15, 2012 at 12:21:30AM -0600, Stephen Warren wrote:
>>>> +static struct irq_chip armctrl_chip = {
>>>> +	.name = "ARMCTRL-level",
>>>> +	.irq_mask = armctrl_mask_irq,
>>>> +	.irq_unmask = armctrl_unmask_irq
>>>> +};
>>>
>>> Might we want to enable CONFIG_GENERIC_IRQ_SHOW_LEVEL ?
>>
>> That sounds like a good idea. I'll patch that in locally without
>> reposting unless anyone has an objection to this.
> 
> Just to be clear, I think that's something that we should enable ARM-wide,
> not on a per-machine or per-SoC basis.

Yes, I see that makes sense, since CONFIG_PPC is the only place that
selects CONFIG_GENERIC_IRQ_SHOW_LEVEL right now.


From linux at arm.linux.org.uk  Sat Sep 15 05:45:43 2012
From: linux at arm.linux.org.uk (Russell King - ARM Linux)
Date: Sat, 15 Sep 2012 10:45:43 +0100
Subject: [PATCH V5 2/5] ARM: bcm2835: add interrupt controller driver
In-Reply-To: <1347690093-16910-2-git-send-email-swarren@wwwdotorg.org>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
 <1347690093-16910-2-git-send-email-swarren@wwwdotorg.org>
Message-ID: <20120915094543.GH12245@n2100.arm.linux.org.uk>

On Sat, Sep 15, 2012 at 12:21:30AM -0600, Stephen Warren wrote:
> +static struct irq_chip armctrl_chip = {
> +	.name = "ARMCTRL-level",
> +	.irq_mask = armctrl_mask_irq,
> +	.irq_unmask = armctrl_unmask_irq
> +};

Might we want to enable CONFIG_GENERIC_IRQ_SHOW_LEVEL ?


From linux at arm.linux.org.uk  Sat Sep 15 14:33:38 2012
From: linux at arm.linux.org.uk (Russell King - ARM Linux)
Date: Sat, 15 Sep 2012 19:33:38 +0100
Subject: [PATCH V5 2/5] ARM: bcm2835: add interrupt controller driver
In-Reply-To: <5054B708.5050005@wwwdotorg.org>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
 <1347690093-16910-2-git-send-email-swarren@wwwdotorg.org>
 <20120915094543.GH12245@n2100.arm.linux.org.uk>
 <5054B708.5050005@wwwdotorg.org>
Message-ID: <20120915183338.GJ12245@n2100.arm.linux.org.uk>

On Sat, Sep 15, 2012 at 11:12:40AM -0600, Stephen Warren wrote:
> On 09/15/2012 03:45 AM, Russell King - ARM Linux wrote:
> > On Sat, Sep 15, 2012 at 12:21:30AM -0600, Stephen Warren wrote:
> >> +static struct irq_chip armctrl_chip = {
> >> +	.name = "ARMCTRL-level",
> >> +	.irq_mask = armctrl_mask_irq,
> >> +	.irq_unmask = armctrl_unmask_irq
> >> +};
> > 
> > Might we want to enable CONFIG_GENERIC_IRQ_SHOW_LEVEL ?
> 
> That sounds like a good idea. I'll patch that in locally without
> reposting unless anyone has an objection to this.

Just to be clear, I think that's something that we should enable ARM-wide,
not on a per-machine or per-SoC basis.


From vincent.sanders at collabora.co.uk  Mon Sep 17 07:00:32 2012
From: vincent.sanders at collabora.co.uk (Vincent Sanders)
Date: Mon, 17 Sep 2012 12:00:32 +0100
Subject: [PATCH] MAINTAINERS: add an entry for the BCM2835 ARM
 sub-architecture
In-Reply-To: <1347690215-17200-1-git-send-email-swarren@wwwdotorg.org>
References: <1347690215-17200-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <20120917110031.GA5038@mail.collabora.co.uk>

On Sat, Sep 15, 2012 at 12:23:35AM -0600, Stephen Warren wrote:
> Add myself as the maintainer for the BCM2835 ARM support, and related
> drivers. This is mainly so that the MAINTAINERS file contains some
> relevant entry, and the rpi/ARM mailing lists; I'd be quite happy if
> anyone else came along and wanted to maintain/co-maintain this.
> 
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
> ---
> Vince, can you confirm that the linux-rpi-kernel list is moderated for
> non-subscribers?

It is

> 
> Note that I cut down the individual to/cc entries when sending this patch,
> since otherwise it doesn't get through to the rpi mailing list, and I
> wanted to ensure this received coverage there.

I have looked at altering this value but it seems I do not have access
to do this. I have been trying to moderate the list at least once a
day to try and keep the delays down.

--
Regards Vincent


From swarren at wwwdotorg.org  Tue Sep 18 23:56:13 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Tue, 18 Sep 2012 21:56:13 -0600
Subject: [PATCH V6] ARM: bcm2835: add stub clock driver
Message-ID: <1348026973-18887-1-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

This patch adds a minimal stub clock driver for the BCM2835. Its sole
purpose is to allow the PL011 AMBA clk_get() API calls to provide
something that looks enough like a clock that the driver probes and
operates correctly.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* Reworked to call clk_register_fixed_rate(), and clk_register_clkdev()
  rather than using static data to represent the clocks.
* Moved implementation to drivers/clk/.
* Modified .dev_id for UART clocks to match UART DT node names.
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.

Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix at gmail.com>
Signed-off-by: Dom Cobley <dc4 at broadcom.com>
Cc: Mike Turquette <mturquette at linaro.org>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
--
v6:
* Reworked to call clk_register_fixed_rate(), and clk_register_clkdev()
  rather than using static data to represent the clocks.
v5:
* No change.
v4:
* Moved implementation to drivers/clk/.
* s/bcm2708/bcm2835/.
* Updated for new device tree vendor prefix.
v3:
* New patch.

clk fixup
---
 arch/arm/mach-bcm2835/bcm2835.c |    3 ++
 drivers/clk/Makefile            |    1 +
 drivers/clk/clk-bcm2835.c       |   58 +++++++++++++++++++++++++++++++++++++++
 include/linux/clk/bcm2835.h     |   24 ++++++++++++++++
 4 files changed, 86 insertions(+)
 create mode 100644 drivers/clk/clk-bcm2835.c
 create mode 100644 include/linux/clk/bcm2835.h

diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index e3f2968..f6fea49 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -16,6 +16,7 @@
 #include <linux/irqchip/bcm2835.h>
 #include <linux/of_platform.h>
 #include <linux/bcm2835_timer.h>
+#include <linux/clk/bcm2835.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -38,6 +39,8 @@ void __init bcm2835_init(void)
 {
 	int ret;
 
+	bcm2835_init_clocks();
+
 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
 				   NULL);
 	if (ret) {
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 5869ea3..d5c19d1 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
 obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed-rate.o clk-gate.o \
 				   clk-mux.o clk-divider.o clk-fixed-factor.o
 # SoCs specific
+obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
 obj-$(CONFIG_ARCH_NOMADIK)	+= clk-nomadik.o
 obj-$(CONFIG_ARCH_HIGHBANK)	+= clk-highbank.o
 obj-$(CONFIG_ARCH_MXS)		+= mxs/
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
new file mode 100644
index 0000000..ad65f0e
--- /dev/null
+++ b/drivers/clk/clk-bcm2835.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/bcm2835.h>
+
+/*
+ * These are fixed clocks. They're probably not all root clocks and it may
+ * be possible to turn them on and off but until this is mapped out better
+ * it's the only way they can be used.
+ */
+void __init bcm2835_init_clocks(void)
+{
+	struct clk *clk;
+	int ret;
+
+	clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
+					250000000);
+	if (!clk)
+		pr_err("sys_pclk not registered\n");
+
+	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
+					126000000);
+	if (!clk)
+		pr_err("apb_pclk not registered\n");
+
+	clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
+					3000000);
+	if (!clk)
+		pr_err("uart0_pclk not registered\n");
+	ret = clk_register_clkdev(clk, NULL, "20201000.uart");
+	if (ret)
+		pr_err("uart0_pclk alias not registered\n");
+
+	clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
+					125000000);
+	if (!clk)
+		pr_err("uart1_pclk not registered\n");
+	ret = clk_register_clkdev(clk, NULL, "20215000.uart");
+	if (ret)
+		pr_err("uart0_pclk alias not registered\n");
+}
diff --git a/include/linux/clk/bcm2835.h b/include/linux/clk/bcm2835.h
new file mode 100644
index 0000000..aa937f6
--- /dev/null
+++ b/include/linux/clk/bcm2835.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_CLK_BCM2835_H_
+#define __LINUX_CLK_BCM2835_H_
+
+void __init bcm2835_init_clocks(void);
+
+#endif
-- 
1.7.9.5



From mturquette at linaro.org  Wed Sep 19 11:38:12 2012
From: mturquette at linaro.org (Mike Turquette)
Date: Wed, 19 Sep 2012 08:38:12 -0700
Subject: [PATCH V6] ARM: bcm2835: add stub clock driver
In-Reply-To: <1348026973-18887-1-git-send-email-swarren@wwwdotorg.org>
References: <1348026973-18887-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <20120919153812.17033.90952@nucleus>

Quoting Stephen Warren (2012-09-18 20:56:13)
> From: Simon Arlott <simon at fire.lp0.eu>
> 
> This patch adds a minimal stub clock driver for the BCM2835. Its sole
> purpose is to allow the PL011 AMBA clk_get() API calls to provide
> something that looks enough like a clock that the driver probes and
> operates correctly.
> 
> This patch was extracted from git://github.com/lp0/linux.git branch
> rpi-split as of 2012/09/08, and modified as follows:
> 
> * Reworked to call clk_register_fixed_rate(), and clk_register_clkdev()
>   rather than using static data to represent the clocks.
> * Moved implementation to drivers/clk/.
> * Modified .dev_id for UART clocks to match UART DT node names.
> * s/bcm2708/bcm2835/.
> * Modified device tree vendor prefix.
> 
> Signed-off-by: Chris Boot <bootc at bootc.net>
> Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
> Signed-off-by: Dom Cobley <popcornmix at gmail.com>
> Signed-off-by: Dom Cobley <dc4 at broadcom.com>
> Cc: Mike Turquette <mturquette at linaro.org>
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>

Acked-by: Mike Turquette <mturquette at linaro.org>

Regards,
Mike

> --
> v6:
> * Reworked to call clk_register_fixed_rate(), and clk_register_clkdev()
>   rather than using static data to represent the clocks.
> v5:
> * No change.
> v4:
> * Moved implementation to drivers/clk/.
> * s/bcm2708/bcm2835/.
> * Updated for new device tree vendor prefix.
> v3:
> * New patch.
> 
> clk fixup
> ---
>  arch/arm/mach-bcm2835/bcm2835.c |    3 ++
>  drivers/clk/Makefile            |    1 +
>  drivers/clk/clk-bcm2835.c       |   58 +++++++++++++++++++++++++++++++++++++++
>  include/linux/clk/bcm2835.h     |   24 ++++++++++++++++
>  4 files changed, 86 insertions(+)
>  create mode 100644 drivers/clk/clk-bcm2835.c
>  create mode 100644 include/linux/clk/bcm2835.h
> 
> diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
> index e3f2968..f6fea49 100644
> --- a/arch/arm/mach-bcm2835/bcm2835.c
> +++ b/arch/arm/mach-bcm2835/bcm2835.c
> @@ -16,6 +16,7 @@
>  #include <linux/irqchip/bcm2835.h>
>  #include <linux/of_platform.h>
>  #include <linux/bcm2835_timer.h>
> +#include <linux/clk/bcm2835.h>
>  
>  #include <asm/mach/arch.h>
>  #include <asm/mach/map.h>
> @@ -38,6 +39,8 @@ void __init bcm2835_init(void)
>  {
>         int ret;
>  
> +       bcm2835_init_clocks();
> +
>         ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
>                                    NULL);
>         if (ret) {
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index 5869ea3..d5c19d1 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -3,6 +3,7 @@ obj-$(CONFIG_CLKDEV_LOOKUP)     += clkdev.o
>  obj-$(CONFIG_COMMON_CLK)       += clk.o clk-fixed-rate.o clk-gate.o \
>                                    clk-mux.o clk-divider.o clk-fixed-factor.o
>  # SoCs specific
> +obj-$(CONFIG_ARCH_BCM2835)     += clk-bcm2835.o
>  obj-$(CONFIG_ARCH_NOMADIK)     += clk-nomadik.o
>  obj-$(CONFIG_ARCH_HIGHBANK)    += clk-highbank.o
>  obj-$(CONFIG_ARCH_MXS)         += mxs/
> diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
> new file mode 100644
> index 0000000..ad65f0e
> --- /dev/null
> +++ b/drivers/clk/clk-bcm2835.c
> @@ -0,0 +1,58 @@
> +/*
> + * Copyright (C) 2010 Broadcom
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/clkdev.h>
> +#include <linux/clk/bcm2835.h>
> +
> +/*
> + * These are fixed clocks. They're probably not all root clocks and it may
> + * be possible to turn them on and off but until this is mapped out better
> + * it's the only way they can be used.
> + */
> +void __init bcm2835_init_clocks(void)
> +{
> +       struct clk *clk;
> +       int ret;
> +
> +       clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
> +                                       250000000);
> +       if (!clk)
> +               pr_err("sys_pclk not registered\n");
> +
> +       clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
> +                                       126000000);
> +       if (!clk)
> +               pr_err("apb_pclk not registered\n");
> +
> +       clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
> +                                       3000000);
> +       if (!clk)
> +               pr_err("uart0_pclk not registered\n");
> +       ret = clk_register_clkdev(clk, NULL, "20201000.uart");
> +       if (ret)
> +               pr_err("uart0_pclk alias not registered\n");
> +
> +       clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
> +                                       125000000);
> +       if (!clk)
> +               pr_err("uart1_pclk not registered\n");
> +       ret = clk_register_clkdev(clk, NULL, "20215000.uart");
> +       if (ret)
> +               pr_err("uart0_pclk alias not registered\n");
> +}
> diff --git a/include/linux/clk/bcm2835.h b/include/linux/clk/bcm2835.h
> new file mode 100644
> index 0000000..aa937f6
> --- /dev/null
> +++ b/include/linux/clk/bcm2835.h
> @@ -0,0 +1,24 @@
> +/*
> + * Copyright (C) 2010 Broadcom
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
> + */
> +
> +#ifndef __LINUX_CLK_BCM2835_H_
> +#define __LINUX_CLK_BCM2835_H_
> +
> +void __init bcm2835_init_clocks(void);
> +
> +#endif
> -- 
> 1.7.9.5
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


From swarren at wwwdotorg.org  Wed Sep 19 12:15:02 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Wed, 19 Sep 2012 10:15:02 -0600
Subject: [PATCH V6] ARM: bcm2835: add stub clock driver
In-Reply-To: <CAOREObGmF9ND9Y16HkczGf0DrUULgg-Y7KRnjof97ATcpsZpmw@mail.gmail.com>
References: <1348026973-18887-1-git-send-email-swarren@wwwdotorg.org>
 <CAOREObGmF9ND9Y16HkczGf0DrUULgg-Y7KRnjof97ATcpsZpmw@mail.gmail.com>
Message-ID: <5059EF86.8060902@wwwdotorg.org>

On 09/19/2012 02:54 AM, Domenico Andreoli wrote:
> Hi Stephen,
> 
> On Sep 19, 2012 5:57 AM, "Stephen Warren" <swarren at wwwdotorg.org
> <mailto:swarren at wwwdotorg.org>> wrote:
>> diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
>> new file mode 100644
>> index 0000000..ad65f0e
>> --- /dev/null
>> +++ b/drivers/clk/clk-bcm2835.c
>> @@ -0,0 +1,58 @@
>> +/*
>> + * Copyright (C) 2010 Broadcom
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
>  02111-1307  USA
>> + */
> 
> why the copyright is of Broadcom? these files are written from scratch
> or anyway being reworked quite a bit, right?

The original code in Simon's branch has this (c) message so I maintained
it. I honestly don't know whether Simon wrote this patch from scratch or
derived it from Broadcom code.

Given the rework I did, I suppose I should have added my (c) on this
patchset too though; I can fix that up locally before sending the pull
request unless you have objections.


From mturquette at linaro.org  Tue Sep 18 13:31:52 2012
From: mturquette at linaro.org (Mike Turquette)
Date: Tue, 18 Sep 2012 10:31:52 -0700
Subject: [PATCH V5 4/5] ARM: bcm2835: add stub clock driver
In-Reply-To: <1347690093-16910-4-git-send-email-swarren@wwwdotorg.org>
References: <1347690093-16910-1-git-send-email-swarren@wwwdotorg.org>
 <1347690093-16910-4-git-send-email-swarren@wwwdotorg.org>
Message-ID: <20120918173152.17033.40823@nucleus>

Quoting Stephen Warren (2012-09-14 23:21:32)
> diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
> new file mode 100644
> index 0000000..148ac35
> --- /dev/null
> +++ b/drivers/clk/clk-bcm2835.c
> @@ -0,0 +1,52 @@
> +/*
> + * Copyright (C) 2010 Broadcom
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clk-private.h>
> +#include <linux/clk-provider.h>

No need to include clk-provider.h or clk.h if you pull in clk-private.h.

Do you really need clk-private.h?  I really hate that approach and I'm
trying to minimize the number of platforms using those interfaces.  I
plan to delete clk-private.h once OMAP and Tegra move away from
statically initialized clocks needed during early boot.

> +#include <linux/clkdev.h>
> +#include <linux/clk/bcm2835.h>
> +
> +/*
> + * These are fixed clocks (and device tree doesn't support clk!).
> + *
> + * They're probably not all root clocks and it may be possible to
> + * turn them on and off but until this is mapped out better it's
> + * the only way they can be used.
> + */
> +DEFINE_CLK_FIXED_RATE(sys_pclk,   CLK_IS_ROOT, 250000000, 0);
> +DEFINE_CLK_FIXED_RATE(apb_pclk,   CLK_IS_ROOT, 126000000, 0);
> +DEFINE_CLK_FIXED_RATE(uart0_pclk, CLK_IS_ROOT,   3000000, 0);
> +DEFINE_CLK_FIXED_RATE(uart1_pclk, CLK_IS_ROOT, 125000000, 0);
> +

How about:

clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT, 250000000);

Regards,
Mike


From andreoloid at gmail.com  Wed Sep 19 04:54:33 2012
From: andreoloid at gmail.com (Domenico Andreoli)
Date: Wed, 19 Sep 2012 10:54:33 +0200
Subject: [PATCH V6] ARM: bcm2835: add stub clock driver
In-Reply-To: <1348026973-18887-1-git-send-email-swarren@wwwdotorg.org>
References: <1348026973-18887-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <CAOREObGmF9ND9Y16HkczGf0DrUULgg-Y7KRnjof97ATcpsZpmw@mail.gmail.com>

Hi Stephen,

On Sep 19, 2012 5:57 AM, "Stephen Warren" <swarren at wwwdotorg.org> wrote:
> diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
> new file mode 100644
> index 0000000..ad65f0e
> --- /dev/null
> +++ b/drivers/clk/clk-bcm2835.c
> @@ -0,0 +1,58 @@
> +/*
> + * Copyright (C) 2010 Broadcom
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
 USA
> + */

why the copyright is of Broadcom? these files are written from scratch or
anyway being reworked quite a bit, right?

cheers,
Domenico
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From swarren at wwwdotorg.org  Wed Sep 19 21:31:58 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Wed, 19 Sep 2012 19:31:58 -0600
Subject: [GIT PULL] ARM: add basic BCM2835 SoC and Raspberry Pi board support
Message-ID: <1348104718-21751-1-git-send-email-swarren@wwwdotorg.org>

The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic
support for this SoC; enough to boot the system into an initrd with
UART console, interrupt controller, timers, and a stub clock driver.

Also provided is a similarly basic device tree for the Raspberry Pi
Model B board.

This series was written by Simon Arlott, Chris Boot, and Dom Cobley
downstream, with reference to a Broadcom tree, and modified for upstream
and submitted by Stephen Warren.

----------------------------------------------------------------

The following changes since commit 55d512e245bc7699a8800e23df1a24195dd08217:

  Linux 3.6-rc5

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra.git rpi-for-3.7

for you to fetch changes up to f680f25c635a1a4327bef34fcbe1e9e3777b546c:

  MAINTAINERS: add an entry for the BCM2835 ARM sub-architecture

----------------------------------------------------------------

Simon Arlott (5):
      ARM: add infra-structure for BCM2835 and Raspberry Pi
      ARM: bcm2835: add interrupt controller driver
      ARM: bcm2835: add system timer
      ARM: bcm2835: add stub clock driver
      ARM: bcm2835: instantiate console UART

Stephen Warren (1):
      MAINTAINERS: add an entry for the BCM2835 ARM sub-architecture

 Documentation/devicetree/bindings/arm/bcm2835.txt  |    8 +
 .../brcm,bcm2835-armctrl-ic.txt                    |  110 +++++++
 .../bindings/timer/brcm,bcm2835-system-timer.txt   |   22 ++
 .../devicetree/bindings/vendor-prefixes.txt        |    1 +
 MAINTAINERS                                        |   10 +
 arch/arm/Kconfig                                   |   17 ++
 arch/arm/Makefile                                  |    1 +
 arch/arm/boot/dts/bcm2835-rpi-b.dts                |   12 +
 arch/arm/boot/dts/bcm2835.dtsi                     |   39 +++
 arch/arm/configs/bcm2835_defconfig                 |   95 ++++++
 arch/arm/mach-bcm2835/Makefile                     |    1 +
 arch/arm/mach-bcm2835/Makefile.boot                |    5 +
 arch/arm/mach-bcm2835/bcm2835.c                    |   64 +++++
 arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h   |   29 ++
 arch/arm/mach-bcm2835/include/mach/debug-macro.S   |   21 ++
 arch/arm/mach-bcm2835/include/mach/timex.h         |   26 ++
 arch/arm/mach-bcm2835/include/mach/uncompress.h    |   45 +++
 drivers/Kconfig                                    |    2 +
 drivers/Makefile                                   |    2 +
 drivers/clk/Makefile                               |    1 +
 drivers/clk/clk-bcm2835.c                          |   59 ++++
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/bcm2835_timer.c                |  161 +++++++++++
 drivers/irqchip/Makefile                           |    1 +
 drivers/irqchip/irq-bcm2835.c                      |  223 +++++++++++++++
 include/linux/bcm2835_timer.h                      |   22 ++
 include/linux/clk/bcm2835.h                        |   24 ++
 include/linux/irqchip/bcm2835.h                    |   29 ++
 28 files changed, 1031 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm2835.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
 create mode 100644 Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
 create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b.dts
 create mode 100644 arch/arm/boot/dts/bcm2835.dtsi
 create mode 100644 arch/arm/configs/bcm2835_defconfig
 create mode 100644 arch/arm/mach-bcm2835/Makefile
 create mode 100644 arch/arm/mach-bcm2835/Makefile.boot
 create mode 100644 arch/arm/mach-bcm2835/bcm2835.c
 create mode 100644 arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h
 create mode 100644 arch/arm/mach-bcm2835/include/mach/debug-macro.S
 create mode 100644 arch/arm/mach-bcm2835/include/mach/timex.h
 create mode 100644 arch/arm/mach-bcm2835/include/mach/uncompress.h
 create mode 100644 drivers/clk/clk-bcm2835.c
 create mode 100644 drivers/clocksource/bcm2835_timer.c
 create mode 100644 drivers/irqchip/Kconfig
 create mode 100644 drivers/irqchip/Makefile
 create mode 100644 drivers/irqchip/irq-bcm2835.c
 create mode 100644 include/linux/bcm2835_timer.h
 create mode 100644 include/linux/clk/bcm2835.h
 create mode 100644 include/linux/irqchip/bcm2835.h


From olof at lixom.net  Thu Sep 20 20:28:14 2012
From: olof at lixom.net (Olof Johansson)
Date: Thu, 20 Sep 2012 17:28:14 -0700
Subject: [GIT PULL] ARM: add basic BCM2835 SoC and Raspberry Pi board
 support
In-Reply-To: <1348104718-21751-1-git-send-email-swarren@wwwdotorg.org>
References: <1348104718-21751-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <20120921002814.GA15296@quad.lixom.net>

On Wed, Sep 19, 2012 at 07:31:58PM -0600, Stephen Warren wrote:
> The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic
> support for this SoC; enough to boot the system into an initrd with
> UART console, interrupt controller, timers, and a stub clock driver.
> 
> Also provided is a similarly basic device tree for the Raspberry Pi
> Model B board.
> 
> This series was written by Simon Arlott, Chris Boot, and Dom Cobley
> downstream, with reference to a Broadcom tree, and modified for upstream
> and submitted by Stephen Warren.
> 
> ----------------------------------------------------------------
> 
> The following changes since commit 55d512e245bc7699a8800e23df1a24195dd08217:
> 
>   Linux 3.6-rc5
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra.git rpi-for-3.7

Nice!

I'm going to guess that you meant linux-rpi.git here since that's where I found
a tag with the commit you're referencing in the pull request at the head. :)

Pulled into bcm2835/soc and next/soc.


Thanks!


-Olof


From swarren at wwwdotorg.org  Thu Sep 20 21:08:59 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 20 Sep 2012 19:08:59 -0600
Subject: [GIT PULL] ARM: add basic BCM2835 SoC and Raspberry Pi board
 support
In-Reply-To: <20120921002814.GA15296@quad.lixom.net>
References: <1348104718-21751-1-git-send-email-swarren@wwwdotorg.org>
 <20120921002814.GA15296@quad.lixom.net>
Message-ID: <505BBE2B.5050909@wwwdotorg.org>

On 09/20/2012 06:28 PM, Olof Johansson wrote:
> On Wed, Sep 19, 2012 at 07:31:58PM -0600, Stephen Warren wrote:
>> The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic
>> support for this SoC; enough to boot the system into an initrd with
>> UART console, interrupt controller, timers, and a stub clock driver.
>>
>> Also provided is a similarly basic device tree for the Raspberry Pi
>> Model B board.
>>
>> This series was written by Simon Arlott, Chris Boot, and Dom Cobley
>> downstream, with reference to a Broadcom tree, and modified for upstream
>> and submitted by Stephen Warren.
>>
>> ----------------------------------------------------------------
>>
>> The following changes since commit 55d512e245bc7699a8800e23df1a24195dd08217:
>>
>>   Linux 3.6-rc5
>>
>> are available in the git repository at:
>>
>>   git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra.git rpi-for-3.7
> 
> Nice!
> 
> I'm going to guess that you meant linux-rpi.git here since that's where I found
> a tag with the commit you're referencing in the pull request at the head. :)

Oops, and I even went to the trouble of editing my pull request script
to make that a parameter..., which I evidently forgot to pass.


From swarren at wwwdotorg.org  Fri Sep 21 00:22:05 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 20 Sep 2012 22:22:05 -0600
Subject: bcm2835: property mailbox or dedicated mailbox for upstream?
Message-ID: <505BEB6D.2040200@wwwdotorg.org>

As background for those not familiar with the BCM2835 SoC, many aspects
of the HW are controlled by firmware running on the VideoCore processor
that exists alongside the ARM CPU, and communication to that core is via
a "mailbox" interface, with SW-defined/implemented messages. The mailbox
interface defines so-called channels, and on each channel a certain
format of messages and protocol is expected.

For some message types, there are different protocols that may be used.
For example, both power management, framebuffer messages may be sent on
the older dedicated channels (0, 1 respectively) or using a more
extensible format on the "property" channel (8/9).

I'd like to propose that for the upstream kernel, we exclusively use the
new property mailbox for the features it supports. In general, the
messages implemented via this protocol are much more flexible and/or
complete than those implemented on the older dedicated channels.

For example, for power management, each message deals with a single HW
module at a time (SD, USB, etc.). This allows each regulator driver on
the Linux side to be coded completely independently. However, the older
dedicated channel requires a bitmask that defines the state of all HW
modules at once, which requires code to unify all the regulator states
together when sending messages, which make the Linux driver more complex.

This of course would make the upstream kernel non-compatible with older
firmwares. But, updating firmware is trivial (copy a file to your SD
card), so this doesn't seem like too big of an issue.

Does anyone disagree with this, or have any other comments?

BTW, are the message formats (for those messages which are defined)
considered stable now; all future changes will be made in a
backwards-compatible fashion?

Perhaps it would be useful to define a new message for "get protocol
version" which would indicate major (incompatible version) and minor
(compatible extensions such as new messages available, or extending
existing messages with more data). Or, should this be inferred from the
existing "get firmware version" message?


From swarren at wwwdotorg.org  Fri Sep 21 00:40:57 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 20 Sep 2012 22:40:57 -0600
Subject: bcm2835: device tree for mbox-driven devices in upstream
Message-ID: <505BEFD9.1020809@wwwdotorg.org>

As background for those not familiar with the BCM2835 SoC, many aspects
of the HW are controlled by firmware running on the VideoCore processor
that exists alongside the ARM CPU, and communication to that core is via
a "mailbox" interface, with SW-defined/implemented messages. The mailbox
interface defines so-called channels, and on each channel a certain
format of messages and protocol is expected.

The existing downstream rpi-split branch uses the following structure
for regulators implemented using the firmware mailbox interface:

vc_mbox: mbox {
    compatible = "broadcom,bcm2835-mbox";
    reg = <0xB880 0x40>;
    interrupts = <0 1>;
    #channel-cells = <1>;
};

power {
    compatible = "broadcom,bcm2835-power-mgr", "simple-bus";
    #address-cells = <1>;
    #size-cells = <0>;

    /* This is assuming the old dedicated channel 0 for power */
    broadcom,vc-mailbox = <&vc_mbox 0>;

    reg_sd: regulator at 0 {
        compatible = "broadcom,bcm2835-power-dev";
        reg = <0>;
    };

    reg_usbhcd: regulator at 3 {
        compatible = "broadcom,bcm2835-power-dev";
        reg = <3>;
    };
};

display {
    compatible = "broadcom,bcm2835-fb";
    /* This is assuming the old dedicated channel 1 for fb */
    broadcom,vc-mailbox = <&vc_mbox 1>;
};

Thinking about this a bit, I see:

a) A parallel between the mailbox node/device and the virtual buses used
by hypervisors for para-virtualized devices.

b) The devices that implement communication across the mailbox API are
logically children of the mailbox device, being addressed/controlled via
the bus.

As such, I think it'd make more sense to rework the device tree along
the following lines while upstreaming the code:

vc_mbox: mbox {
    compatible = "broadcom,bcm2835-mbox";
    reg = <0xB880 0x40>;
    interrupts = <0 1>;

    channels {
        #address-cells = <1>;
        #size-cells = <0>;

        channel at 2 {
            /* This is the mbox channel ID */
            reg = <2>;

            uart {
                /* MBOX-based virtual UART */
                compatible = "broadcom,bcm2835-mbox-vuart";
            };
        };

        channel at 8 {
            /*
             * This is the mbox channel ID. Here we assume the new
             * property mailbox channel for most devices; see my
             * previous email.
             */
            reg = <8>;

            /*
             * Multiple independant ojects may communicate over the same
             * channel, for the protocol on some channels at least.
             */
            reg_sd: sd {
                compatible = "broadcom,bcm2835-mbox-power";
            };

            reg_usbhcd: usbhcd {
                compatible = "broadcom,bcm2835-mbox-power";
            };

            display {
                compatible = "broadcom,bcm2835-mbox-fb";
            };
        };
    };
};

Does anyone have any comments/suggestions on this?


From elezegarcia at gmail.com  Sat Sep 22 15:03:42 2012
From: elezegarcia at gmail.com (Ezequiel Garcia)
Date: Sat, 22 Sep 2012 16:03:42 -0300
Subject: [Q] USB is very slow. Is this a known bug?
Message-ID: <CALF0-+W4Fsxb+0v+tjSOBBue=hQv3nf1DnVW3NWi_A3Tkn++PQ@mail.gmail.com>

Hello,

Has anyone had problems with usb bandwidth?

According to this page:
http://elinux.org/RPi_Performance#USB_bus

The rpi can achieve 30 Mb/s.

However, a user has reported a much lower bandwidth, as low as 2 Mb/s.
See here:
https://github.com/ezequielgarcia/stk1160-standalone/issues/5#issuecomment-7560214

Is this a known bug? Has anyone seen using vanilla kernel?

Are there any ideas for what might be going on?

Thanks,
Ezequiel.


From greg at kroah.com  Sat Sep 22 16:04:27 2012
From: greg at kroah.com (Greg KH)
Date: Sat, 22 Sep 2012 13:04:27 -0700
Subject: [Q] USB is very slow. Is this a known bug?
In-Reply-To: <CALF0-+W4Fsxb+0v+tjSOBBue=hQv3nf1DnVW3NWi_A3Tkn++PQ@mail.gmail.com>
References: <CALF0-+W4Fsxb+0v+tjSOBBue=hQv3nf1DnVW3NWi_A3Tkn++PQ@mail.gmail.com>
Message-ID: <20120922200427.GA14004@kroah.com>

On Sat, Sep 22, 2012 at 04:03:42PM -0300, Ezequiel Garcia wrote:
> Hello,
> 
> Has anyone had problems with usb bandwidth?
> 
> According to this page:
> http://elinux.org/RPi_Performance#USB_bus
> 
> The rpi can achieve 30 Mb/s.

With a tail wind fall downhill, it maybe can get that fast.

> However, a user has reported a much lower bandwidth, as low as 2 Mb/s.
> See here:
> https://github.com/ezequielgarcia/stk1160-standalone/issues/5#issuecomment-7560214

Quite common, most USB storage devices are really really slow.  Also,
iso data is quite different for this controller, it's amazing that it
even works.

Heck, it's amazing that USB works at all on this hardware in the first
place, Just be happy you are getting _any_ data from it :)

> Is this a known bug? Has anyone seen using vanilla kernel?

You can't use a "vanilla" kernel on the rpi right now, especially for
USB.

> Are there any ideas for what might be going on?

Yes, the hardware is broken, the drivers are broken, and I would not
recommend anyone wanting to do any real USB data transfers to use this
platform at all.  Seriously.  Go complain to Broadcom if you want to see
this fixed, they are the ones with the specs that we can not get access
to.

Good luck,

greg k-h


From elezegarcia at gmail.com  Sat Sep 22 16:25:33 2012
From: elezegarcia at gmail.com (Ezequiel Garcia)
Date: Sat, 22 Sep 2012 17:25:33 -0300
Subject: [Q] USB is very slow. Is this a known bug?
In-Reply-To: <20120922200427.GA14004@kroah.com>
References: <CALF0-+W4Fsxb+0v+tjSOBBue=hQv3nf1DnVW3NWi_A3Tkn++PQ@mail.gmail.com>
 <20120922200427.GA14004@kroah.com>
Message-ID: <CALF0-+VxGUha8uHJr+YQMh9-t9jFsz-g3j8D8SVmMwy5-HCNHw@mail.gmail.com>

Hi Greg!

On Sat, Sep 22, 2012 at 5:04 PM, Greg KH <greg at kroah.com> wrote:
> On Sat, Sep 22, 2012 at 04:03:42PM -0300, Ezequiel Garcia wrote:
>> Hello,
>>
>> Has anyone had problems with usb bandwidth?
>>
>> According to this page:
>> http://elinux.org/RPi_Performance#USB_bus
>>
>> The rpi can achieve 30 Mb/s.
>
> With a tail wind fall downhill, it maybe can get that fast.
>

:-)

>> However, a user has reported a much lower bandwidth, as low as 2 Mb/s.
>> See here:
>> https://github.com/ezequielgarcia/stk1160-standalone/issues/5#issuecomment-7560214
>
> Quite common, most USB storage devices are really really slow.  Also,
> iso data is quite different for this controller, it's amazing that it
> even works.
>

The user reports he made the test with a "fast" device, meaning
that same device can output 30 Mb/s in his laptop (see same link).


> Heck, it's amazing that USB works at all on this hardware in the first
> place, Just be happy you are getting _any_ data from it :)
>
>> Is this a known bug? Has anyone seen using vanilla kernel?
>
> You can't use a "vanilla" kernel on the rpi right now, especially for
> USB.
>
>> Are there any ideas for what might be going on?
>
> Yes, the hardware is broken, the drivers are broken, and I would not
> recommend anyone wanting to do any real USB data transfers to use this
> platform at all.  Seriously.  Go complain to Broadcom if you want to see
> this fixed, they are the ones with the specs that we can not get access
> to.
>

Mmmm, I see.

For some reason (cheapness? crazyness?)
there are a few users out there wanting to do video streaming
with their rpi and they want to use stk1160 devices.
Thus my question.

I don't want to bother you asking: what do you mean by "hw is broken",
"drivers are broken"?
But ... is it related to the fact eth and usb goes through same bus?

Thanks,
Ezequiel.


From greg at kroah.com  Sat Sep 22 16:37:48 2012
From: greg at kroah.com (Greg KH)
Date: Sat, 22 Sep 2012 13:37:48 -0700
Subject: [Q] USB is very slow. Is this a known bug?
In-Reply-To: <CALF0-+VxGUha8uHJr+YQMh9-t9jFsz-g3j8D8SVmMwy5-HCNHw@mail.gmail.com>
References: <CALF0-+W4Fsxb+0v+tjSOBBue=hQv3nf1DnVW3NWi_A3Tkn++PQ@mail.gmail.com>
 <20120922200427.GA14004@kroah.com>
 <CALF0-+VxGUha8uHJr+YQMh9-t9jFsz-g3j8D8SVmMwy5-HCNHw@mail.gmail.com>
Message-ID: <20120922203748.GA14625@kroah.com>

On Sat, Sep 22, 2012 at 05:25:33PM -0300, Ezequiel Garcia wrote:
> > Yes, the hardware is broken, the drivers are broken, and I would not
> > recommend anyone wanting to do any real USB data transfers to use this
> > platform at all.  Seriously.  Go complain to Broadcom if you want to see
> > this fixed, they are the ones with the specs that we can not get access
> > to.
> >
> 
> Mmmm, I see.
> 
> For some reason (cheapness? crazyness?)
> there are a few users out there wanting to do video streaming
> with their rpi and they want to use stk1160 devices.
> Thus my question.

The answer is, "It will not work, buy a beaglebone or something real if
you wish to do that."

> I don't want to bother you asking: what do you mean by "hw is broken",

Just that, the USB controller in this board can not handle this type of
throughput.  If anyone doubts me, please show me the chip specs that
show me otherwise (yes, this is a ploy to get the specs from Broadcom,
but nothing else seems to work...)

> "drivers are broken"?

The USB driver code is horrible, really really horrible.  Seriously,
it's so bad that no one will touch it, myself included.

> But ... is it related to the fact eth and usb goes through same bus?

Possibly, it's just a really bad USB controller chip, combined with a
sad way to hook it up to the processor, combined with with a truly
horrible driver make for the fact that USB works at all on this board a
total miracle.

And you can quote me on that.

greg k-h


From elezegarcia at gmail.com  Sat Sep 22 16:48:33 2012
From: elezegarcia at gmail.com (Ezequiel Garcia)
Date: Sat, 22 Sep 2012 17:48:33 -0300
Subject: [Q] USB is very slow. Is this a known bug?
In-Reply-To: <20120922203748.GA14625@kroah.com>
References: <CALF0-+W4Fsxb+0v+tjSOBBue=hQv3nf1DnVW3NWi_A3Tkn++PQ@mail.gmail.com>
 <20120922200427.GA14004@kroah.com>
 <CALF0-+VxGUha8uHJr+YQMh9-t9jFsz-g3j8D8SVmMwy5-HCNHw@mail.gmail.com>
 <20120922203748.GA14625@kroah.com>
Message-ID: <CALF0-+Ud0pObHwAFkWRHFXtBG2MYw5NWLE-k5wiyjHNq2F2hGA@mail.gmail.com>

On Sat, Sep 22, 2012 at 5:37 PM, Greg KH <greg at kroah.com> wrote:
> On Sat, Sep 22, 2012 at 05:25:33PM -0300, Ezequiel Garcia wrote:
>
>> But ... is it related to the fact eth and usb goes through same bus?
>
> Possibly, it's just a really bad USB controller chip, combined with a
> sad way to hook it up to the processor, combined with with a truly
> horrible driver make for the fact that USB works at all on this board a
> total miracle.
>
> And you can quote me on that.
>

In fact, I'll make a t-shirt with that quote :-)


From cavokz at gmail.com  Wed Sep 26 17:26:39 2012
From: cavokz at gmail.com (Domenico Andreoli)
Date: Wed, 26 Sep 2012 23:26:39 +0200
Subject: [PATCH V6] ARM: bcm2835: add stub clock driver
In-Reply-To: <5059EF86.8060902@wwwdotorg.org>
References: <1348026973-18887-1-git-send-email-swarren@wwwdotorg.org>
 <CAOREObGmF9ND9Y16HkczGf0DrUULgg-Y7KRnjof97ATcpsZpmw@mail.gmail.com>
 <5059EF86.8060902@wwwdotorg.org>
Message-ID: <20120926212639.GA20182@glitch>

On Wed, Sep 19, 2012 at 10:15:02AM -0600, Stephen Warren wrote:
> On 09/19/2012 02:54 AM, Domenico Andreoli wrote:
> > Hi Stephen,
> > 
> > On Sep 19, 2012 5:57 AM, "Stephen Warren" <swarren at wwwdotorg.org
> > <mailto:swarren at wwwdotorg.org>> wrote:
> >> diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
> >> new file mode 100644
> >> index 0000000..ad65f0e
> >> --- /dev/null
> >> +++ b/drivers/clk/clk-bcm2835.c
> >> @@ -0,0 +1,58 @@
> >> +/*
> >> + * Copyright (C) 2010 Broadcom
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License as published by
> >> + * the Free Software Foundation; either version 2 of the License, or
> >> + * (at your option) any later version.
> >> + *
> >> + * This program is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> >> + * GNU General Public License for more details.
> >> + *
> >> + * You should have received a copy of the GNU General Public License
> >> + * along with this program; if not, write to the Free Software
> >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
> >  02111-1307  USA
> >> + */
> > 
> > why the copyright is of Broadcom? these files are written from scratch
> > or anyway being reworked quite a bit, right?
> 
> The original code in Simon's branch has this (c) message so I maintained
> it. I honestly don't know whether Simon wrote this patch from scratch or
> derived it from Broadcom code.
> 
> Given the rework I did, I suppose I should have added my (c) on this
> patchset too though; I can fix that up locally before sending the pull
> request unless you have objections.

No objections for sure. Thanks.

Domenico


From swarren at wwwdotorg.org  Fri Sep 28 00:08:00 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 27 Sep 2012 22:08:00 -0600
Subject: [PATCH] ARM: bcm2835: implement machine restart hook
Message-ID: <1348805280-7647-1-git-send-email-swarren@wwwdotorg.org>

Implement the machine restart hook using the SoC's watchdog timer module.
To support this, define a DT binding for the watchdog module, and add it
to the device tree.

The downstream rpi-split branch contains a full watchdog timer driver
implementation, which also implements the restart hook. However, the
restart function is largely separate from the watchdog driver, so for
simplicity, the restart hook is implemented here directly in the main
machine source file.

Overall structure (separate setup/restart) functions derived from the
picoxcell ARM support.

Watchdog register IO sequence taken from code by Simon Arlott. Note that
the watchdog module is not documented in BCM2835-ARM-Peripherals.pdf.

Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
 .../bindings/watchdog/brcm,bcm2835-pm-wdog.txt     |   13 ++++++
 arch/arm/boot/dts/bcm2835.dtsi                     |    5 +++
 arch/arm/mach-bcm2835/bcm2835.c                    |   46 ++++++++++++++++++++
 3 files changed, 64 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt

diff --git a/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt b/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt
new file mode 100644
index 0000000..03138e6
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt
@@ -0,0 +1,13 @@
+BCM2835 Watchdog timer
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-pm-wdog"
+- reg : Specifies base physical address and size of the registers.
+
+Example:
+
+intc: interrupt-controller {
+	compatible = "brcm,bcm2835-pm-wdog";
+	reg = <0x7e100000 0x28>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 0b61939..7e0d515 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -29,6 +29,11 @@
 			#interrupt-cells = <2>;
 		};
 
+		watchdog {
+			compatible = "brcm,bcm2835-pm-wdog";
+			reg = <0x7e100000 0x28>;
+		};
+
 		uart at 20201000 {
 			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 			reg = <0x7e201000 0x1000>;
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index f6fea49..35859c6 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -12,8 +12,10 @@
  * GNU General Public License for more details.
  */
 
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/irqchip/bcm2835.h>
+#include <linux/of_address.h>
 #include <linux/of_platform.h>
 #include <linux/bcm2835_timer.h>
 #include <linux/clk/bcm2835.h>
@@ -23,6 +25,48 @@
 
 #include <mach/bcm2835_soc.h>
 
+#define PM_RSTC				0x1c
+#define PM_WDOG				0x24
+
+#define PM_PASSWORD			0x5a000000
+#define PM_RSTC_WRCFG_MASK		0x00000030
+#define PM_RSTC_WRCFG_FULL_RESET	0x00000020
+
+static void __iomem *wdt_regs;
+
+/*
+ * The machine restart method can be called from an atomic context so we won't
+ * be able to ioremap the regs then.
+ */
+static void bcm2835_setup_restart(void)
+{
+	struct device_node *np = of_find_compatible_node(NULL, NULL,
+						"brcm,bcm2835-pm-wdog");
+	if (WARN(!np, "unable to setup watchdog restart"))
+		return;
+
+	wdt_regs = of_iomap(np, 0);
+	WARN(!wdt_regs, "failed to remap watchdog regs");
+}
+
+static void bcm2835_restart(char mode, const char *cmd)
+{
+	u32 val;
+
+	if (!wdt_regs)
+		return;
+
+	/* use a timeout of 10 ticks (~150us) */
+	writel_relaxed(10 | PM_PASSWORD, wdt_regs + PM_WDOG);
+	val = readl_relaxed(wdt_regs + PM_RSTC);
+	val &= ~PM_RSTC_WRCFG_MASK;
+	val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
+	writel_relaxed(val, wdt_regs + PM_RSTC);
+
+	/* No sleeping, possibly atomic. */
+	mdelay(1);
+}
+
 static struct map_desc io_map __initdata = {
 	.virtual = BCM2835_PERIPH_VIRT,
 	.pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),
@@ -39,6 +83,7 @@ void __init bcm2835_init(void)
 {
 	int ret;
 
+	bcm2835_setup_restart();
 	bcm2835_init_clocks();
 
 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
@@ -60,5 +105,6 @@ DT_MACHINE_START(BCM2835, "BCM2835")
 	.handle_irq = bcm2835_handle_irq,
 	.init_machine = bcm2835_init,
 	.timer = &bcm2835_timer,
+	.restart = bcm2835_restart,
 	.dt_compat = bcm2835_compat
 MACHINE_END
-- 
1.7.9.5



From swarren at wwwdotorg.org  Fri Sep 28 00:10:12 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 27 Sep 2012 22:10:12 -0600
Subject: [PATCH 2/2] ARM: bcm2835: enable GPIO/pinctrl
In-Reply-To: <1348805412-7804-1-git-send-email-swarren@wwwdotorg.org>
References: <1348805412-7804-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <1348805412-7804-2-git-send-email-swarren@wwwdotorg.org>

Enable GPIO and pinctrl in Kconfig.

Add required <mach/gpio.h> for gpiolib.

Instantiate the BCM2835 GPIO module in bcm2835.dtsi.

Add a pinctrl definition to bcm2835-rpi-b.dts that sets up all of the
board's required pinmux configuration. GPIO aren't specified; that's
left to gpio_request().

Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
 arch/arm/Kconfig                          |    5 ++++-
 arch/arm/boot/dts/bcm2835-rpi-b.dts       |   15 +++++++++++++++
 arch/arm/boot/dts/bcm2835.dtsi            |   23 +++++++++++++++++++++++
 arch/arm/mach-bcm2835/include/mach/gpio.h |    1 +
 4 files changed, 43 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-bcm2835/include/mach/gpio.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 84e914a..257ac7c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -351,7 +351,7 @@ config ARCH_AT91
 
 config ARCH_BCM2835
 	bool "Broadcom BCM2835 family"
-	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARCH_REQUIRE_GPIOLIB
 	select ARM_AMBA
 	select ARM_ERRATA_411920
 	select ARM_TIMER_SP804
@@ -359,7 +359,10 @@ config ARCH_BCM2835
 	select COMMON_CLK
 	select CPU_V6
 	select GENERIC_CLOCKEVENTS
+	select GENERIC_GPIO
 	select MULTI_IRQ_HANDLER
+	select PINCTRL
+	select PINCTRL_BCM2835
 	select SPARSE_IRQ
 	select USE_OF
 	help
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index 7dd860f..9b72054 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -10,3 +10,18 @@
 		reg = <0 0x10000000>;
 	};
 };
+
+&gpio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&alt0 &alt3>;
+
+	alt0: alt0 {
+		brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 14 15 40 45>;
+		brcm,function = <4>; /* alt0 */
+	};
+
+	alt3: alt3 {
+		brcm,pins = <48 49 50 51 52 53>;
+		brcm,function = <7>; /* alt3 */
+	};
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 7e0d515..7e22ed3 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -40,5 +40,28 @@
 			interrupts = <2 25>;
 			clock-frequency = <3000000>;
 		};
+
+		gpio: gpio {
+			compatible = "brcm,bcm2835-gpio";
+			reg = <0x7e200000 0xb4>;
+			/*
+			 * The GPIO IP block is designed for 3 banks of GPIOs.
+			 * Each bank has a GPIO interrupt for itself.
+			 * There is an overall "any bank" interrupt.
+			 * In order, these are GIC interrupts 17, 18, 19, 20.
+			 * Since the BCM2835 only has 2 banks, the 2nd bank
+			 * interrupt output appears to be mirrored onto the
+			 * 3rd bank's interrupt signal.
+			 * So, a bank0 interrupt shows up on 17, 20, and
+			 * a bank1 interrupt shows up on 18, 19, 20!
+			 */
+			interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
 	};
 };
diff --git a/arch/arm/mach-bcm2835/include/mach/gpio.h b/arch/arm/mach-bcm2835/include/mach/gpio.h
new file mode 100644
index 0000000..40a8c17
--- /dev/null
+++ b/arch/arm/mach-bcm2835/include/mach/gpio.h
@@ -0,0 +1 @@
+/* empty */
-- 
1.7.9.5



From swarren at wwwdotorg.org  Fri Sep 28 00:10:11 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Thu, 27 Sep 2012 22:10:11 -0600
Subject: [PATCH 1/2] pinctrl: add bcm2835 driver
Message-ID: <1348805412-7804-1-git-send-email-swarren@wwwdotorg.org>

From: Simon Arlott <simon at fire.lp0.eu>

The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt
controller, and pinmux/control device.

Original driver by Simon Arlott.
Rewrite including GPIO chip device by Chris Boot.

Upstreaming changes by Stephen Warren:
* Wrote DT binding documentation.
* Changed brcm,function to an integer to more directly match the
  datasheet, and to match brcm,pins being an integer.
* Implemented pull-up/down pin config.
* Removed read-only DT property and related code. The restriction this
  implemented are driven by the board, not the GPIO HW block, so don't
  really make sense of a HW block binding, were in general incomplete
  (since they could only know about the few pins hard-coded into the
  Raspberry Pi B board design and not the uncommitted GPIOS), and are
  better represented simply by not writing incorrect data into pin
  configuration nodes.
* Don't set GPIO_IN function select in gpio_request_enable() to avoid
  glitches; defer this to gpio_set_direction(). Consequently, removed
  empty bcm2835_pmx_gpio_request_enable().
* Simplified enabled_irq_map[]; make it explicitly 1 entry per bank.
* Lifted use of enabled_irq_map[] outside the per-interrupt loop in
  IRQ handler, thus fixing an issue where the code was indexing into
  enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID.
* Removed locking in IRQ handler, since all other code uses
  spin_lock_irqsave() and so guarantees it doesn't run concurrently
  with the handler.
* Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of
  bcm2835_gpio_pins[].
* Remove range-checking from bcm2835_pctl_get_groups_count() since we've
  decided to trust the pinctrl core.
* Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set()
  directly for simplicity.
* Fixed body of dt_free_map() to match latest dt_node_to_map().
* Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl
  core owns doing this.
* Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more
  descriptive.
* Simplified remove(); removed call to non-existent
  pinctrl_remove_gpio_range(), remove early return on error.
* Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's
  base GPIO number.
* Error-handling cleanups in probe().
* Switched to module_platform_driver() rather than open-coding.
* Made pin, group, and function names lower-case.
* s/broadcom/brcm/ in DT property names.
* s/2708/2835/.
* Fixed a couple minor checkpatch warnings, and other minor cleanup.

Signed-off-by: Simon Arlott <simon at fire.lp0.eu>
Signed-off-by: Chris Boot <bootc at bootc.net>
Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
Linus, this patch can go into your tree anytime. I can take patch 2 into
the BCM2835 tree independently.

 .../bindings/pinctrl/brcm,bcm2835-gpio.txt         |   74 ++
 drivers/pinctrl/Kconfig                            |    5 +
 drivers/pinctrl/Makefile                           |    1 +
 drivers/pinctrl/pinctrl-bcm2835.c                  | 1075 ++++++++++++++++++++
 4 files changed, 1155 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
 create mode 100644 drivers/pinctrl/pinctrl-bcm2835.c

diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
new file mode 100644
index 0000000..8edc20e
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
@@ -0,0 +1,74 @@
+Broadcom BCM2835 GPIO (and pinmux) controller
+
+The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt
+controller, and pinmux/control device.
+
+Required properties:
+- compatible: "brcm,bcm2835-gpio"
+- reg: Should contain the physical address of the GPIO module's registes.
+- gpio-controller: Marks the device node as a GPIO controller.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+  second cell is used to specify optional parameters:
+  - bit 0 specifies polarity (0 for normal, 1 for inverted)
+- interrupts : The interrupt outputs from the controller. One interrupt per
+  individual bank followed by the "all banks" interrupt.
+- interrupt-controller: Marks the device node as an interrupt controller.
+- #interrupt-cells : Should be 2.
+  The first cell is the GPIO number.
+  The second cell is used to specify flags:
+    bits[3:0] trigger type and level flags:
+      1 = low-to-high edge triggered.
+      2 = high-to-low edge triggered.
+      4 = active high level-sensitive.
+      8 = active low level-sensitive.
+    Valid combinations are 1, 2, 3, 4, 8.
+
+Please refer to ../gpio/gpio.txt for a general description of GPIO bindings.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+Each pin configuration node lists the pin(s) to which it applies, and one or
+more of the mux function to select on those pin(s), and pull-up/down
+configuration. Each subnode only affects those parameters that are explicitly
+listed. In other words, a subnode that lists only a mux function implies no
+information about any pull configuration. Similarly, a subnode that lists only
+a pul parameter implies no information about the mux function.
+
+Required subnode-properties:
+- brcm,pins: An array of cells. Each cell contains the ID of a pin. Valid IDs
+  are the integer GPIO IDs; 0==GPIO0, 1==GPIO1, ... 53==GPIO53.
+
+Optional subnode-properties:
+- brcm,function: Integer, containing the function to mux to the pin(s):
+  0: GPIO in
+  1: GPIO out
+  2: alt5
+  3: alt4
+  4: alt0
+  5: alt1
+  6: alt2
+  7: alt3
+- brcm,pull: Integer, representing the pull-down/up to apply to the pin(s):
+  0: none
+  1: down
+  2: up
+
+Each of brcm,function and brcm,pull may contain either a single value which
+will be applied to all pins in brcm,pins, or 1 value for each entry in
+brcm,pins.
+
+Example:
+
+	gpio: gpio {
+		compatible = "brcm,bcm2835-gpio";
+		reg = <0x2200000 0xb4>;
+		interrupts = <2 17>, <2 19>, <2 18>, <2 20>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 274980dc..638f0e4 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -26,6 +26,11 @@ config DEBUG_PINCTRL
 	help
 	  Say Y here to add some extra checks and diagnostics to PINCTRL calls.
 
+config PINCTRL_BCM2835
+	bool
+	select PINMUX
+	select PINCONF
+
 config PINCTRL_IMX
 	bool
 	select PINMUX
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 60baaff..00eb628 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -9,6 +9,7 @@ ifeq ($(CONFIG_OF),y)
 obj-$(CONFIG_PINCTRL)		+= devicetree.o
 endif
 obj-$(CONFIG_GENERIC_PINCONF)	+= pinconf-generic.o
+obj-$(CONFIG_PINCTRL_BCM2835)	+= pinctrl-bcm2835.o
 obj-$(CONFIG_PINCTRL_IMX)	+= pinctrl-imx.o
 obj-$(CONFIG_PINCTRL_IMX35)	+= pinctrl-imx35.o
 obj-$(CONFIG_PINCTRL_IMX51)	+= pinctrl-imx51.o
diff --git a/drivers/pinctrl/pinctrl-bcm2835.c b/drivers/pinctrl/pinctrl-bcm2835.c
new file mode 100644
index 0000000..a4adee6
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-bcm2835.c
@@ -0,0 +1,1075 @@
+/*
+ * Driver for Broadcom BCM2835 GPIO unit (pinctrl + GPIO)
+ *
+ * Copyright (C) 2012 Chris Boot, Simon Arlott, Stephen Warren
+ *
+ * This driver is inspired by:
+ * pinctrl-nomadik.c, please see original file for copyright information
+ * pinctrl-tegra.c, please see original file for copyright information
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/bitmap.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqdesc.h>
+#include <linux/irqdomain.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/platform_device.h>
+#include <linux/seq_file.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
+#define MODULE_NAME "pinctrl-bcm2835"
+#define BCM2835_NUM_GPIOS 54
+#define BCM2835_NUM_BANKS 2
+
+#define BCM2835_PIN_BITMAP_SZ \
+	DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
+
+/* GPIO register offsets */
+#define GPFSEL0		0x0	/* Function Select */
+#define GPSET0		0x1c	/* Pin Output Set */
+#define GPCLR0		0x28	/* Pin Output Clear */
+#define GPLEV0		0x34	/* Pin Level */
+#define GPEDS0		0x40	/* Pin Event Detect Status */
+#define GPREN0		0x4c	/* Pin Rising Edge Detect Enable */
+#define GPFEN0		0x58	/* Pin Falling Edge Detect Enable */
+#define GPHEN0		0x64	/* Pin High Detect Enable */
+#define GPLEN0		0x70	/* Pin Low Detect Enable */
+#define GPAREN0		0x7c	/* Pin Async Rising Edge Detect */
+#define GPAFEN0		0x88	/* Pin Async Falling Edge Detect */
+#define GPPUD		0x94	/* Pin Pull-up/down Enable */
+#define GPPUDCLK0	0x98	/* Pin Pull-up/down Enable Clock */
+
+#define FSEL_REG(p)		(GPFSEL0 + (((p) / 10) * 4))
+#define FSEL_SHIFT(p)		(((p) % 10) * 3)
+#define GPIO_REG_OFFSET(p)	((p) / 32)
+#define GPIO_REG_SHIFT(p)	((p) % 32)
+
+enum bcm2835_pinconf_param {
+	/* argument: bcm2835_pinconf_pull */
+	BCM2835_PINCONF_PARAM_PULL,
+};
+
+enum bcm2835_pinconf_pull {
+	BCM2835_PINCONFIG_PULL_NONE,
+	BCM2835_PINCONFIG_PULL_DOWN,
+	BCM2835_PINCONFIG_PULL_UP,
+};
+
+#define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
+#define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
+#define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
+
+struct bcm2835_gpio_irqdata {
+	struct bcm2835_pinctrl *pc;
+	int bank;
+};
+
+struct bcm2835_pinctrl {
+	struct device *dev;
+	void __iomem *base;
+	int irq[BCM2835_NUM_BANKS];
+
+	/* note: locking assumes each bank will have its own unsigned long */
+	unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
+	unsigned int irq_type[BCM2835_NUM_GPIOS];
+
+	struct pinctrl_dev *pctl_dev;
+	struct irq_domain *irq_domain;
+	struct gpio_chip gpio_chip;
+	struct pinctrl_gpio_range gpio_range;
+
+	struct bcm2835_gpio_irqdata irq_data[BCM2835_NUM_BANKS];
+	spinlock_t irq_lock[BCM2835_NUM_BANKS];
+};
+
+static struct lock_class_key gpio_lock_class;
+
+/* pins are just named GPIO0..GPIO53 */
+#define BCM2835_GPIO_PIN(a) PINCTRL_PIN(a, "gpio" #a)
+struct pinctrl_pin_desc bcm2835_gpio_pins[] = {
+	BCM2835_GPIO_PIN(0),
+	BCM2835_GPIO_PIN(1),
+	BCM2835_GPIO_PIN(2),
+	BCM2835_GPIO_PIN(3),
+	BCM2835_GPIO_PIN(4),
+	BCM2835_GPIO_PIN(5),
+	BCM2835_GPIO_PIN(6),
+	BCM2835_GPIO_PIN(7),
+	BCM2835_GPIO_PIN(8),
+	BCM2835_GPIO_PIN(9),
+	BCM2835_GPIO_PIN(10),
+	BCM2835_GPIO_PIN(11),
+	BCM2835_GPIO_PIN(12),
+	BCM2835_GPIO_PIN(13),
+	BCM2835_GPIO_PIN(14),
+	BCM2835_GPIO_PIN(15),
+	BCM2835_GPIO_PIN(16),
+	BCM2835_GPIO_PIN(17),
+	BCM2835_GPIO_PIN(18),
+	BCM2835_GPIO_PIN(19),
+	BCM2835_GPIO_PIN(20),
+	BCM2835_GPIO_PIN(21),
+	BCM2835_GPIO_PIN(22),
+	BCM2835_GPIO_PIN(23),
+	BCM2835_GPIO_PIN(24),
+	BCM2835_GPIO_PIN(25),
+	BCM2835_GPIO_PIN(26),
+	BCM2835_GPIO_PIN(27),
+	BCM2835_GPIO_PIN(28),
+	BCM2835_GPIO_PIN(29),
+	BCM2835_GPIO_PIN(30),
+	BCM2835_GPIO_PIN(31),
+	BCM2835_GPIO_PIN(32),
+	BCM2835_GPIO_PIN(33),
+	BCM2835_GPIO_PIN(34),
+	BCM2835_GPIO_PIN(35),
+	BCM2835_GPIO_PIN(36),
+	BCM2835_GPIO_PIN(37),
+	BCM2835_GPIO_PIN(38),
+	BCM2835_GPIO_PIN(39),
+	BCM2835_GPIO_PIN(40),
+	BCM2835_GPIO_PIN(41),
+	BCM2835_GPIO_PIN(42),
+	BCM2835_GPIO_PIN(43),
+	BCM2835_GPIO_PIN(44),
+	BCM2835_GPIO_PIN(45),
+	BCM2835_GPIO_PIN(46),
+	BCM2835_GPIO_PIN(47),
+	BCM2835_GPIO_PIN(48),
+	BCM2835_GPIO_PIN(49),
+	BCM2835_GPIO_PIN(50),
+	BCM2835_GPIO_PIN(51),
+	BCM2835_GPIO_PIN(52),
+	BCM2835_GPIO_PIN(53),
+};
+
+/* one pin per group */
+static const char * const bcm2835_gpio_groups[] = {
+	"gpio0",
+	"gpio1",
+	"gpio2",
+	"gpio3",
+	"gpio4",
+	"gpio5",
+	"gpio6",
+	"gpio7",
+	"gpio8",
+	"gpio9",
+	"gpio10",
+	"gpio11",
+	"gpio12",
+	"gpio13",
+	"gpio14",
+	"gpio15",
+	"gpio16",
+	"gpio17",
+	"gpio18",
+	"gpio19",
+	"gpio20",
+	"gpio21",
+	"gpio22",
+	"gpio23",
+	"gpio24",
+	"gpio25",
+	"gpio26",
+	"gpio27",
+	"gpio28",
+	"gpio29",
+	"gpio30",
+	"gpio31",
+	"gpio32",
+	"gpio33",
+	"gpio34",
+	"gpio35",
+	"gpio36",
+	"gpio37",
+	"gpio38",
+	"gpio39",
+	"gpio40",
+	"gpio41",
+	"gpio42",
+	"gpio43",
+	"gpio44",
+	"gpio45",
+	"gpio46",
+	"gpio47",
+	"gpio48",
+	"gpio49",
+	"gpio50",
+	"gpio51",
+	"gpio52",
+	"gpio53",
+};
+
+enum bcm2835_fsel {
+	BCM2835_FSEL_GPIO_IN = 0,
+	BCM2835_FSEL_GPIO_OUT = 1,
+	BCM2835_FSEL_ALT0 = 4,
+	BCM2835_FSEL_ALT1 = 5,
+	BCM2835_FSEL_ALT2 = 6,
+	BCM2835_FSEL_ALT3 = 7,
+	BCM2835_FSEL_ALT4 = 3,
+	BCM2835_FSEL_ALT5 = 2,
+	BCM2835_FSEL_COUNT = 8,
+	BCM2835_FSEL_MASK = 0x7,
+};
+
+static const char * const bcm2835_functions[BCM2835_FSEL_COUNT] = {
+	[BCM2835_FSEL_GPIO_IN] = "gpio_in",
+	[BCM2835_FSEL_GPIO_OUT] = "gpio_out",
+	[BCM2835_FSEL_ALT0] = "alt0",
+	[BCM2835_FSEL_ALT1] = "alt1",
+	[BCM2835_FSEL_ALT2] = "alt2",
+	[BCM2835_FSEL_ALT3] = "alt3",
+	[BCM2835_FSEL_ALT4] = "alt4",
+	[BCM2835_FSEL_ALT5] = "alt5",
+};
+
+static const char * const irq_type_names[] = {
+	[IRQ_TYPE_NONE] = "none",
+	[IRQ_TYPE_EDGE_RISING] = "edge-rising",
+	[IRQ_TYPE_EDGE_FALLING] = "edge-falling",
+	[IRQ_TYPE_EDGE_BOTH] = "edge-both",
+	[IRQ_TYPE_LEVEL_HIGH] = "level-high",
+	[IRQ_TYPE_LEVEL_LOW] = "level-low",
+};
+
+static inline u32 bcm2835_gpio_rd(struct bcm2835_pinctrl *pc, unsigned reg)
+{
+	return readl(pc->base + reg);
+}
+
+static inline void bcm2835_gpio_wr(struct bcm2835_pinctrl *pc, unsigned reg,
+		u32 val)
+{
+	writel(val, pc->base + reg);
+}
+
+static inline int bcm2835_gpio_get_bit(struct bcm2835_pinctrl *pc, unsigned reg,
+		unsigned bit)
+{
+	reg += GPIO_REG_OFFSET(bit) * 4;
+	return (bcm2835_gpio_rd(pc, reg) >> GPIO_REG_SHIFT(bit)) & 1;
+}
+
+/* note NOT a read/modify/write cycle */
+static inline void bcm2835_gpio_set_bit(struct bcm2835_pinctrl *pc,
+		unsigned reg, unsigned bit)
+{
+	reg += GPIO_REG_OFFSET(bit) * 4;
+	bcm2835_gpio_wr(pc, reg, BIT(GPIO_REG_SHIFT(bit)));
+}
+
+static inline enum bcm2835_fsel bcm2835_pinctrl_fsel_get(
+		struct bcm2835_pinctrl *pc, unsigned pin)
+{
+	u32 val = bcm2835_gpio_rd(pc, FSEL_REG(pin));
+	enum bcm2835_fsel status = (val >> FSEL_SHIFT(pin)) & BCM2835_FSEL_MASK;
+
+	dev_dbg(pc->dev, "get %08x (%u => %s)\n", val, pin,
+			bcm2835_functions[status]);
+
+	return status;
+}
+
+static inline void bcm2835_pinctrl_fsel_set(
+		struct bcm2835_pinctrl *pc, unsigned pin,
+		enum bcm2835_fsel fsel)
+{
+	u32 val = bcm2835_gpio_rd(pc, FSEL_REG(pin));
+	enum bcm2835_fsel cur = (val >> FSEL_SHIFT(pin)) & BCM2835_FSEL_MASK;
+
+	dev_dbg(pc->dev, "read %08x (%u => %s)\n", val, pin,
+			bcm2835_functions[cur]);
+
+	if (cur == fsel)
+		return;
+
+	if (cur != BCM2835_FSEL_GPIO_IN && fsel != BCM2835_FSEL_GPIO_IN) {
+		/* always transition through GPIO_IN */
+		val &= ~(BCM2835_FSEL_MASK << FSEL_SHIFT(pin));
+		val |= BCM2835_FSEL_GPIO_IN << FSEL_SHIFT(pin);
+
+		dev_dbg(pc->dev, "trans %08x (%u <= %s)\n", val, pin,
+				bcm2835_functions[BCM2835_FSEL_GPIO_IN]);
+		bcm2835_gpio_wr(pc, FSEL_REG(pin), val);
+	}
+
+	val &= ~(BCM2835_FSEL_MASK << FSEL_SHIFT(pin));
+	val |= fsel << FSEL_SHIFT(pin);
+
+	dev_dbg(pc->dev, "write %08x (%u <= %s)\n", val, pin,
+			bcm2835_functions[fsel]);
+	bcm2835_gpio_wr(pc, FSEL_REG(pin), val);
+}
+
+static int bcm2835_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+	return pinctrl_request_gpio(chip->base + offset);
+}
+
+static void bcm2835_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+	pinctrl_free_gpio(chip->base + offset);
+}
+
+static int bcm2835_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+	return pinctrl_gpio_direction_input(chip->base + offset);
+}
+
+static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+	struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+
+	return bcm2835_gpio_get_bit(pc, GPLEV0, offset);
+}
+
+static int bcm2835_gpio_direction_output(struct gpio_chip *chip,
+		unsigned offset, int value)
+{
+	return pinctrl_gpio_direction_output(chip->base + offset);
+}
+
+static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+	struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+
+	bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset);
+}
+
+static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+	struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
+
+	return irq_linear_revmap(pc->irq_domain, offset);
+}
+
+static struct gpio_chip bcm2835_gpio_chip __devinitconst = {
+	.label = MODULE_NAME,
+	.owner = THIS_MODULE,
+	.request = bcm2835_gpio_request,
+	.free = bcm2835_gpio_free,
+	.direction_input = bcm2835_gpio_direction_input,
+	.direction_output = bcm2835_gpio_direction_output,
+	.get = bcm2835_gpio_get,
+	.set = bcm2835_gpio_set,
+	.to_irq = bcm2835_gpio_to_irq,
+	.base = -1,
+	.ngpio = BCM2835_NUM_GPIOS,
+	.can_sleep = 0,
+};
+
+static irqreturn_t bcm2835_gpio_irq_handler(int irq, void *dev_id)
+{
+	struct bcm2835_gpio_irqdata *irqdata = dev_id;
+	struct bcm2835_pinctrl *pc = irqdata->pc;
+	int bank = irqdata->bank;
+	unsigned long events;
+	unsigned offset;
+	unsigned gpio;
+	unsigned int type;
+
+	events = bcm2835_gpio_rd(pc, GPEDS0 + bank * 4);
+	events &= pc->enabled_irq_map[bank];
+	for_each_set_bit(offset, &events, 32) {
+		gpio = (32 * bank) + offset;
+		type = pc->irq_type[gpio];
+
+		/* ack edge triggered IRQs immediately */
+		if (!(type & IRQ_TYPE_LEVEL_MASK))
+			bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
+
+		generic_handle_irq(irq_linear_revmap(pc->irq_domain, gpio));
+
+		/* ack level triggered IRQ after handling them */
+		if (type & IRQ_TYPE_LEVEL_MASK)
+			bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
+	}
+	return events ? IRQ_HANDLED : IRQ_NONE;
+}
+
+static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
+	unsigned reg, unsigned offset, bool enable)
+{
+	u32 value;
+	reg += GPIO_REG_OFFSET(offset) * 4;
+	value = bcm2835_gpio_rd(pc, reg);
+	if (enable)
+		value |= BIT(GPIO_REG_SHIFT(offset));
+	else
+		value &= ~(BIT(GPIO_REG_SHIFT(offset)));
+	bcm2835_gpio_wr(pc, reg, value);
+}
+
+/* fast path for IRQ handler */
+static void bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
+	unsigned offset, bool enable)
+{
+	switch (pc->irq_type[offset]) {
+	case IRQ_TYPE_EDGE_RISING:
+		__bcm2835_gpio_irq_config(pc, GPREN0, offset, enable);
+		break;
+
+	case IRQ_TYPE_EDGE_FALLING:
+		__bcm2835_gpio_irq_config(pc, GPFEN0, offset, enable);
+		break;
+
+	case IRQ_TYPE_EDGE_BOTH:
+		__bcm2835_gpio_irq_config(pc, GPREN0, offset, enable);
+		__bcm2835_gpio_irq_config(pc, GPFEN0, offset, enable);
+		break;
+
+	case IRQ_TYPE_LEVEL_HIGH:
+		__bcm2835_gpio_irq_config(pc, GPHEN0, offset, enable);
+		break;
+
+	case IRQ_TYPE_LEVEL_LOW:
+		__bcm2835_gpio_irq_config(pc, GPLEN0, offset, enable);
+		break;
+	}
+}
+
+static void bcm2835_gpio_irq_enable(struct irq_data *data)
+{
+	struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
+	unsigned gpio = irqd_to_hwirq(data);
+	unsigned offset = GPIO_REG_SHIFT(gpio);
+	unsigned bank = GPIO_REG_OFFSET(gpio);
+	unsigned long flags;
+
+	spin_lock_irqsave(&pc->irq_lock[bank], flags);
+	set_bit(offset, &pc->enabled_irq_map[bank]);
+	bcm2835_gpio_irq_config(pc, gpio, true);
+	spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
+}
+
+static void bcm2835_gpio_irq_disable(struct irq_data *data)
+{
+	struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
+	unsigned gpio = irqd_to_hwirq(data);
+	unsigned offset = GPIO_REG_SHIFT(gpio);
+	unsigned bank = GPIO_REG_OFFSET(gpio);
+	unsigned long flags;
+
+	spin_lock_irqsave(&pc->irq_lock[bank], flags);
+	bcm2835_gpio_irq_config(pc, gpio, false);
+	clear_bit(offset, &pc->enabled_irq_map[bank]);
+	spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
+}
+
+static int __bcm2835_gpio_irq_set_type_disabled(struct bcm2835_pinctrl *pc,
+	unsigned offset, unsigned int type)
+{
+	switch (type) {
+	case IRQ_TYPE_NONE:
+	case IRQ_TYPE_EDGE_RISING:
+	case IRQ_TYPE_EDGE_FALLING:
+	case IRQ_TYPE_EDGE_BOTH:
+	case IRQ_TYPE_LEVEL_HIGH:
+	case IRQ_TYPE_LEVEL_LOW:
+		pc->irq_type[offset] = type;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+/* slower path for reconfiguring IRQ type */
+static int __bcm2835_gpio_irq_set_type_enabled(struct bcm2835_pinctrl *pc,
+	unsigned offset, unsigned int type)
+{
+	switch (type) {
+	case IRQ_TYPE_NONE:
+		if (pc->irq_type[offset] != type) {
+			bcm2835_gpio_irq_config(pc, offset, false);
+			pc->irq_type[offset] = type;
+		}
+		break;
+
+	case IRQ_TYPE_EDGE_RISING:
+		if (pc->irq_type[offset] == IRQ_TYPE_EDGE_BOTH) {
+			/* RISING already enabled, disable FALLING */
+			pc->irq_type[offset] = IRQ_TYPE_EDGE_FALLING;
+			bcm2835_gpio_irq_config(pc, offset, false);
+			pc->irq_type[offset] = type;
+		} else if (pc->irq_type[offset] != type) {
+			bcm2835_gpio_irq_config(pc, offset, false);
+			pc->irq_type[offset] = type;
+			bcm2835_gpio_irq_config(pc, offset, true);
+		}
+		break;
+
+	case IRQ_TYPE_EDGE_FALLING:
+		if (pc->irq_type[offset] == IRQ_TYPE_EDGE_BOTH) {
+			/* FALLING already enabled, disable RISING */
+			pc->irq_type[offset] = IRQ_TYPE_EDGE_RISING;
+			bcm2835_gpio_irq_config(pc, offset, false);
+			pc->irq_type[offset] = type;
+		} else if (pc->irq_type[offset] != type) {
+			bcm2835_gpio_irq_config(pc, offset, false);
+			pc->irq_type[offset] = type;
+			bcm2835_gpio_irq_config(pc, offset, true);
+		}
+		break;
+
+	case IRQ_TYPE_EDGE_BOTH:
+		if (pc->irq_type[offset] == IRQ_TYPE_EDGE_RISING) {
+			/* RISING already enabled, enable FALLING too */
+			pc->irq_type[offset] = IRQ_TYPE_EDGE_FALLING;
+			bcm2835_gpio_irq_config(pc, offset, true);
+			pc->irq_type[offset] = type;
+		} else if (pc->irq_type[offset] == IRQ_TYPE_EDGE_FALLING) {
+			/* FALLING already enabled, enable RISING too */
+			pc->irq_type[offset] = IRQ_TYPE_EDGE_RISING;
+			bcm2835_gpio_irq_config(pc, offset, true);
+			pc->irq_type[offset] = type;
+		} else if (pc->irq_type[offset] != type) {
+			bcm2835_gpio_irq_config(pc, offset, false);
+			pc->irq_type[offset] = type;
+			bcm2835_gpio_irq_config(pc, offset, true);
+		}
+		break;
+
+	case IRQ_TYPE_LEVEL_HIGH:
+	case IRQ_TYPE_LEVEL_LOW:
+		if (pc->irq_type[offset] != type) {
+			bcm2835_gpio_irq_config(pc, offset, false);
+			pc->irq_type[offset] = type;
+			bcm2835_gpio_irq_config(pc, offset, true);
+		}
+		break;
+
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int bcm2835_gpio_irq_set_type(struct irq_data *data, unsigned int type)
+{
+	struct bcm2835_pinctrl *pc = irq_data_get_irq_chip_data(data);
+	unsigned gpio = irqd_to_hwirq(data);
+	unsigned offset = GPIO_REG_SHIFT(gpio);
+	unsigned bank = GPIO_REG_OFFSET(gpio);
+	unsigned long flags;
+	int ret;
+
+	spin_lock_irqsave(&pc->irq_lock[bank], flags);
+
+	if (test_bit(offset, &pc->enabled_irq_map[bank]))
+		ret = __bcm2835_gpio_irq_set_type_enabled(pc, gpio, type);
+	else
+		ret = __bcm2835_gpio_irq_set_type_disabled(pc, gpio, type);
+
+	spin_unlock_irqrestore(&pc->irq_lock[bank], flags);
+
+	return ret;
+}
+
+static struct irq_chip bcm2835_gpio_irq_chip = {
+	.name = MODULE_NAME,
+	.irq_enable = bcm2835_gpio_irq_enable,
+	.irq_disable = bcm2835_gpio_irq_disable,
+	.irq_set_type = bcm2835_gpio_irq_set_type,
+};
+
+static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+	return ARRAY_SIZE(bcm2835_gpio_groups);
+}
+
+static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev,
+		unsigned selector)
+{
+	return bcm2835_gpio_groups[selector];
+}
+
+static int bcm2835_pctl_get_group_pins(struct pinctrl_dev *pctldev,
+		unsigned selector,
+		const unsigned **pins,
+		unsigned *num_pins)
+{
+	*pins = &bcm2835_gpio_pins[selector].number;
+	*num_pins = 1;
+
+	return 0;
+}
+
+static void bcm2835_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
+		struct seq_file *s,
+		unsigned offset)
+{
+	struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+	enum bcm2835_fsel fsel = bcm2835_pinctrl_fsel_get(pc, offset);
+	const char *fname = bcm2835_functions[fsel];
+	int value = bcm2835_gpio_get_bit(pc, GPLEV0, offset);
+	int irq = irq_find_mapping(pc->irq_domain, offset);
+
+	seq_printf(s, "function %s in %s; irq %d (%s)",
+		fname, value ? "hi" : "lo",
+		irq, irq_type_names[pc->irq_type[offset]]);
+}
+
+static void bcm2835_pctl_dt_free_map(struct pinctrl_dev *pctldev,
+		struct pinctrl_map *maps, unsigned num_maps)
+{
+	int i;
+
+	for (i = 0; i < num_maps; i++)
+		if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
+			kfree(maps[i].data.configs.configs);
+
+	kfree(maps);
+}
+
+static int bcm2835_pctl_dt_node_to_map_func(struct bcm2835_pinctrl *pc,
+		struct device_node *np, u32 pin, u32 fnum,
+		struct pinctrl_map **maps)
+{
+	struct pinctrl_map *map = *maps;
+
+	if (fnum >= ARRAY_SIZE(bcm2835_functions)) {
+		dev_err(pc->dev, "%s: invalid brcm,function %d\n",
+			of_node_full_name(np), fnum);
+		return -EINVAL;
+	}
+
+	map->type = PIN_MAP_TYPE_MUX_GROUP;
+	map->data.mux.group = bcm2835_gpio_groups[pin];
+	map->data.mux.function = bcm2835_functions[fnum];
+	(*maps)++;
+
+	return 0;
+}
+
+static int bcm2835_pctl_dt_node_to_map_pull(struct bcm2835_pinctrl *pc,
+		struct device_node *np, u32 pin, u32 pull,
+		struct pinctrl_map **maps)
+{
+	struct pinctrl_map *map = *maps;
+	unsigned long *configs;
+
+	if (pull > 2) {
+		dev_err(pc->dev, "%s: invalid brcm,pull %d\n",
+			of_node_full_name(np), pull);
+		return -EINVAL;
+	}
+
+	configs = kzalloc(sizeof(*configs), GFP_KERNEL);
+	if (!configs)
+		return -ENOMEM;
+	configs[0] = BCM2835_PINCONF_PACK(BCM2835_PINCONF_PARAM_PULL, pull);
+
+	map->type = PIN_MAP_TYPE_CONFIGS_PIN;
+	map->data.configs.group_or_pin = bcm2835_gpio_pins[pin].name;
+	map->data.configs.configs = configs;
+	map->data.configs.num_configs = 1;
+	(*maps)++;
+
+	return 0;
+}
+
+static inline u32 prop_u32(struct property *p, int i)
+{
+	return be32_to_cpup(((__be32 *)p->value) + i);
+}
+
+static int bcm2835_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
+		struct device_node *np,
+		struct pinctrl_map **map, unsigned *num_maps)
+{
+	struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+	struct property *pins, *funcs, *pulls;
+	int num_pins, num_funcs, num_pulls, maps_per_pin;
+	struct pinctrl_map *maps, *cur_map;
+	int i, err;
+	u32 pin, func, pull;
+
+	pins = of_find_property(np, "brcm,pins", NULL);
+	if (!pins) {
+		dev_err(pc->dev, "%s: missing brcm,pins property\n",
+				of_node_full_name(np));
+		return -EINVAL;
+	}
+
+	funcs = of_find_property(np, "brcm,function", NULL);
+	pulls = of_find_property(np, "brcm,pull", NULL);
+
+	if (!funcs && !pulls) {
+		dev_err(pc->dev,
+			"%s: neither brcm,function nor brcm,pull specified\n",
+			of_node_full_name(np));
+		return -EINVAL;
+	}
+
+	num_pins = pins->length / 4;
+	num_funcs = funcs ? (funcs->length / 4) : 0;
+	num_pulls = pulls ? (pulls->length / 4) : 0;
+
+	if (num_funcs > 1 && num_funcs != num_pins) {
+		dev_err(pc->dev,
+			"%s: brcm,function must have 1 or %d entries\n",
+			of_node_full_name(np), num_pins);
+		return -EINVAL;
+	}
+
+	if (num_pulls > 1 && num_pulls != num_pins) {
+		dev_err(pc->dev,
+			"%s: brcm,pull must have 1 or %d entries\n",
+			of_node_full_name(np), num_pins);
+		return -EINVAL;
+	}
+
+	maps_per_pin = 0;
+	if (num_funcs)
+		maps_per_pin++;
+	if (num_pulls)
+		maps_per_pin++;
+	cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps),
+				GFP_KERNEL);
+	if (!maps)
+		return -ENOMEM;
+
+	for (i = 0; i < num_pins; i++) {
+		pin = prop_u32(pins, i);
+		if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) {
+			dev_err(pc->dev, "%s: invalid brcm,pins value %d\n",
+				of_node_full_name(np), pin);
+			err = -EINVAL;
+			goto out;
+		}
+
+		if (num_funcs) {
+			func = prop_u32(funcs, (num_funcs > 1) ? i : 0);
+			err = bcm2835_pctl_dt_node_to_map_func(pc, np, pin,
+							func, &cur_map);
+			if (err)
+				goto out;
+		}
+		if (num_pulls) {
+			pull = prop_u32(pulls, (num_pulls > 1) ? i : 0);
+			err = bcm2835_pctl_dt_node_to_map_pull(pc, np, pin,
+							pull, &cur_map);
+			if (err)
+				goto out;
+		}
+	}
+
+	*map = maps;
+	*num_maps = num_pins * maps_per_pin;
+
+	return 0;
+
+out:
+	kfree(maps);
+	return err;
+}
+
+static struct pinctrl_ops bcm2835_pctl_ops = {
+	.get_groups_count = bcm2835_pctl_get_groups_count,
+	.get_group_name = bcm2835_pctl_get_group_name,
+	.get_group_pins = bcm2835_pctl_get_group_pins,
+	.pin_dbg_show = bcm2835_pctl_pin_dbg_show,
+	.dt_node_to_map = bcm2835_pctl_dt_node_to_map,
+	.dt_free_map = bcm2835_pctl_dt_free_map,
+};
+
+static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
+{
+	return BCM2835_FSEL_COUNT;
+}
+
+static const char *bcm2835_pmx_get_function_name(struct pinctrl_dev *pctldev,
+		unsigned selector)
+{
+	return bcm2835_functions[selector];
+}
+
+static int bcm2835_pmx_get_function_groups(struct pinctrl_dev *pctldev,
+		unsigned selector,
+		const char * const **groups,
+		unsigned * const num_groups)
+{
+	/* every pin can do every function */
+	*groups = bcm2835_gpio_groups;
+	*num_groups = ARRAY_SIZE(bcm2835_gpio_groups);
+
+	return 0;
+}
+
+static int bcm2835_pmx_enable(struct pinctrl_dev *pctldev,
+		unsigned func_selector,
+		unsigned group_selector)
+{
+	struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+
+	bcm2835_pinctrl_fsel_set(pc, group_selector, func_selector);
+
+	return 0;
+}
+
+static void bcm2835_pmx_disable(struct pinctrl_dev *pctldev,
+		unsigned func_selector,
+		unsigned group_selector)
+{
+	struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+
+	/* disable by setting to GPIO_IN */
+	bcm2835_pinctrl_fsel_set(pc, group_selector, BCM2835_FSEL_GPIO_IN);
+}
+
+static void bcm2835_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
+		struct pinctrl_gpio_range *range,
+		unsigned offset)
+{
+	struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+
+	/* disable by setting to GPIO_IN */
+	bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN);
+}
+
+static int bcm2835_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
+		struct pinctrl_gpio_range *range,
+		unsigned offset,
+		bool input)
+{
+	struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+	enum bcm2835_fsel fsel = input ?
+		BCM2835_FSEL_GPIO_IN : BCM2835_FSEL_GPIO_OUT;
+
+	bcm2835_pinctrl_fsel_set(pc, offset, fsel);
+
+	return 0;
+}
+
+static struct pinmux_ops bcm2835_pmx_ops = {
+	.get_functions_count = bcm2835_pmx_get_functions_count,
+	.get_function_name = bcm2835_pmx_get_function_name,
+	.get_function_groups = bcm2835_pmx_get_function_groups,
+	.enable = bcm2835_pmx_enable,
+	.disable = bcm2835_pmx_disable,
+	.gpio_disable_free = bcm2835_pmx_gpio_disable_free,
+	.gpio_set_direction = bcm2835_pmx_gpio_set_direction,
+};
+
+static int bcm2835_pinconf_get(struct pinctrl_dev *pctldev,
+			unsigned pin, unsigned long *config)
+{
+	/* No way to read back config in HW */
+	return -ENOTSUPP;
+}
+
+static int bcm2835_pinconf_set(struct pinctrl_dev *pctldev,
+			unsigned pin, unsigned long config)
+{
+	struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+	enum bcm2835_pinconf_param param = BCM2835_PINCONF_UNPACK_PARAM(config);
+	u16 arg = BCM2835_PINCONF_UNPACK_ARG(config);
+	u32 off, bit;
+
+	if (param != BCM2835_PINCONF_PARAM_PULL)
+		return -EINVAL;
+
+	off = GPIO_REG_OFFSET(pin);
+	bit = GPIO_REG_SHIFT(pin);
+
+	bcm2835_gpio_wr(pc, GPPUD, arg & 3);
+	/*
+	 * Docs say to wait 150 cycles, but not of what. We assume a
+	 * 1 MHz clock here, which is pretty slow...
+	 */
+	udelay(150);
+	bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), BIT(bit));
+	udelay(150);
+	bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), 0);
+
+	return 0;
+}
+
+struct pinconf_ops bcm2835_pinconf_ops = {
+	.pin_config_get = bcm2835_pinconf_get,
+	.pin_config_set = bcm2835_pinconf_set,
+};
+
+static struct pinctrl_desc bcm2835_pinctrl_desc = {
+	.name = MODULE_NAME,
+	.pins = bcm2835_gpio_pins,
+	.npins = ARRAY_SIZE(bcm2835_gpio_pins),
+	.pctlops = &bcm2835_pctl_ops,
+	.pmxops = &bcm2835_pmx_ops,
+	.confops = &bcm2835_pinconf_ops,
+	.owner = THIS_MODULE,
+};
+
+static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range __devinitconst = {
+	.name = MODULE_NAME,
+	.npins = BCM2835_NUM_GPIOS,
+};
+
+static int __devinit bcm2835_pinctrl_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	struct bcm2835_pinctrl *pc;
+	struct resource iomem;
+	int err, i;
+	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS);
+	BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS);
+
+	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
+	if (!pc)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, pc);
+	pc->dev = dev;
+
+	err = of_address_to_resource(np, 0, &iomem);
+	if (err) {
+		dev_err(dev, "could not get IO memory\n");
+		return err;
+	}
+
+	pc->base = devm_request_and_ioremap(&pdev->dev, &iomem);
+	if (!pc->base)
+		return -EADDRNOTAVAIL;
+
+	pc->gpio_chip = bcm2835_gpio_chip;
+	pc->gpio_chip.dev = dev;
+	pc->gpio_chip.of_node = np;
+
+	pc->irq_domain = irq_domain_add_linear(np, BCM2835_NUM_GPIOS,
+			&irq_domain_simple_ops, NULL);
+	if (!pc->irq_domain) {
+		dev_err(dev, "could not create IRQ domain\n");
+		return -ENOMEM;
+	}
+
+	for (i = 0; i < BCM2835_NUM_GPIOS; i++) {
+		int irq = irq_create_mapping(pc->irq_domain, i);
+		irq_set_lockdep_class(irq, &gpio_lock_class);
+		irq_set_chip_and_handler(irq, &bcm2835_gpio_irq_chip,
+				handle_simple_irq);
+		irq_set_chip_data(irq, pc);
+		set_irq_flags(irq, IRQF_VALID);
+	}
+
+	for (i = 0; i < BCM2835_NUM_BANKS; i++) {
+		unsigned long events;
+		unsigned offset;
+		int len;
+		char *name;
+
+		/* clear event detection flags */
+		bcm2835_gpio_wr(pc, GPREN0 + i * 4, 0);
+		bcm2835_gpio_wr(pc, GPFEN0 + i * 4, 0);
+		bcm2835_gpio_wr(pc, GPHEN0 + i * 4, 0);
+		bcm2835_gpio_wr(pc, GPLEN0 + i * 4, 0);
+		bcm2835_gpio_wr(pc, GPAREN0 + i * 4, 0);
+		bcm2835_gpio_wr(pc, GPAFEN0 + i * 4, 0);
+
+		/* clear all the events */
+		events = bcm2835_gpio_rd(pc, GPEDS0 + i * 4);
+		for_each_set_bit(offset, &events, 32)
+			bcm2835_gpio_wr(pc, GPEDS0 + i * 4, BIT(offset));
+
+		pc->irq[i] = irq_of_parse_and_map(np, i);
+		pc->irq_data[i].pc = pc;
+		pc->irq_data[i].bank = i;
+		spin_lock_init(&pc->irq_lock[i]);
+
+		len = strlen(dev_name(pc->dev)) + 16;
+		name = devm_kzalloc(pc->dev, len, GFP_KERNEL);
+		if (!name)
+			return -ENOMEM;
+		snprintf(name, len, "%s:bank%d", dev_name(pc->dev), i);
+
+		err = devm_request_irq(dev, pc->irq[i],
+			bcm2835_gpio_irq_handler, IRQF_SHARED,
+			name, &pc->irq_data[i]);
+		if (err) {
+			dev_err(dev, "unable to request IRQ %d\n", pc->irq[i]);
+			return err;
+		}
+	}
+
+	err = gpiochip_add(&pc->gpio_chip);
+	if (err) {
+		dev_err(dev, "could not add GPIO chip\n");
+		return err;
+	}
+
+	pc->pctl_dev = pinctrl_register(&bcm2835_pinctrl_desc, dev, pc);
+	if (!pc->pctl_dev) {
+		gpiochip_remove(&pc->gpio_chip);
+		return PTR_ERR(pc->pctl_dev);
+	}
+
+	pc->gpio_range = bcm2835_pinctrl_gpio_range;
+	pc->gpio_range.base = pc->gpio_chip.base;
+	pc->gpio_range.gc = &pc->gpio_chip;
+	pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
+
+	return 0;
+}
+
+static int __devexit bcm2835_pinctrl_remove(struct platform_device *pdev)
+{
+	struct bcm2835_pinctrl *pc = platform_get_drvdata(pdev);
+
+	pinctrl_unregister(pc->pctl_dev);
+	gpiochip_remove(&pc->gpio_chip);
+
+	return 0;
+}
+
+static struct of_device_id bcm2835_pinctrl_match[] __devinitconst = {
+	{ .compatible = "brcm,bcm2835-gpio" },
+	{}
+};
+MODULE_DEVICE_TABLE(of, bcm2835_pinctrl_match);
+
+static struct platform_driver bcm2835_pinctrl_driver = {
+	.probe = bcm2835_pinctrl_probe,
+	.remove = bcm2835_pinctrl_remove,
+	.driver = {
+		.name = MODULE_NAME,
+		.owner = THIS_MODULE,
+		.of_match_table = bcm2835_pinctrl_match,
+	},
+};
+module_platform_driver(bcm2835_pinctrl_driver);
+
+MODULE_AUTHOR("Chris Boot, Simon Arlott, Stephen Warren");
+MODULE_DESCRIPTION("BCM2835 Pin control driver");
+MODULE_LICENSE("GPL");
-- 
1.7.9.5



From linus.walleij at linaro.org  Fri Sep 28 04:40:50 2012
From: linus.walleij at linaro.org (Linus Walleij)
Date: Fri, 28 Sep 2012 10:40:50 +0200
Subject: [PATCH 1/2] pinctrl: add bcm2835 driver
In-Reply-To: <1348805412-7804-1-git-send-email-swarren@wwwdotorg.org>
References: <1348805412-7804-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <CACRpkdbpGUfcE8mG7iPA_kocj3XGw8QSL37NMS+-KXgNGoqK9w@mail.gmail.com>

On Fri, Sep 28, 2012 at 6:10 AM, Stephen Warren <swarren at wwwdotorg.org> wrote:

> From: Simon Arlott <simon at fire.lp0.eu>
>
> The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt
> controller, and pinmux/control device.
>
> Original driver by Simon Arlott.
> Rewrite including GPIO chip device by Chris Boot.

It's such a sweet thing that I can't resist it, and since it's
a new driver it's OK this late in the cycle, so:
patch applied.

Yours,
Linus Walleij


From linus.walleij at linaro.org  Fri Sep 28 04:50:02 2012
From: linus.walleij at linaro.org (Linus Walleij)
Date: Fri, 28 Sep 2012 10:50:02 +0200
Subject: [PATCH 2/2] ARM: bcm2835: enable GPIO/pinctrl
In-Reply-To: <1348805412-7804-2-git-send-email-swarren@wwwdotorg.org>
References: <1348805412-7804-1-git-send-email-swarren@wwwdotorg.org>
 <1348805412-7804-2-git-send-email-swarren@wwwdotorg.org>
Message-ID: <CACRpkdaUkz5kVZqMeDB6X0B6=0YX4_KxM0eG9RmJMJ4ujkvShw@mail.gmail.com>

On Fri, Sep 28, 2012 at 6:10 AM, Stephen Warren <swarren at wwwdotorg.org> wrote:

> Enable GPIO and pinctrl in Kconfig.
>
> Add required <mach/gpio.h> for gpiolib.
>
> Instantiate the BCM2835 GPIO module in bcm2835.dtsi.
>
> Add a pinctrl definition to bcm2835-rpi-b.dts that sets up all of the
> board's required pinmux configuration. GPIO aren't specified; that's
> left to gpio_request().
>
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>

This thing does not apply to my tree because of deps in
other trees (I guess ARM SoC).

You have my ACK:
Acked-by: Linus Walleij <linus.walleij at linaro.org>

If you figure out a way to get it into a later part of the
merge window, else it'll need to wait for v3.7-rc1.

Yours,
Linus Walleij


From thomas.petazzoni at free-electrons.com  Fri Sep 28 06:15:18 2012
From: thomas.petazzoni at free-electrons.com (Thomas Petazzoni)
Date: Fri, 28 Sep 2012 12:15:18 +0200
Subject: [PATCH] ARM: bcm2835: implement machine restart hook
In-Reply-To: <1348805280-7647-1-git-send-email-swarren@wwwdotorg.org>
References: <1348805280-7647-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <20120928121518.7f88196b@skate>

Stephen,

On Thu, 27 Sep 2012 22:08:00 -0600, Stephen Warren wrote:

> +intc: interrupt-controller {

Isn't this a bizarre name for a watchdog device?

> +	compatible = "brcm,bcm2835-pm-wdog";
> +	reg = <0x7e100000 0x28>;
> +};

Thomas
-- 
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com


From plagnioj at jcrosoft.com  Fri Sep 28 06:31:40 2012
From: plagnioj at jcrosoft.com (Jean-Christophe PLAGNIOL-VILLARD)
Date: Fri, 28 Sep 2012 12:31:40 +0200
Subject: [PATCH] ARM: bcm2835: implement machine restart hook
In-Reply-To: <1348805280-7647-1-git-send-email-swarren@wwwdotorg.org>
References: <1348805280-7647-1-git-send-email-swarren@wwwdotorg.org>
Message-ID: <20120928103140.GZ17667@game.jcrosoft.org>

On 22:08 Thu 27 Sep     , Stephen Warren wrote:
> Implement the machine restart hook using the SoC's watchdog timer module.
> To support this, define a DT binding for the watchdog module, and add it
> to the device tree.
> 
> The downstream rpi-split branch contains a full watchdog timer driver
> implementation, which also implements the restart hook. However, the
> restart function is largely separate from the watchdog driver, so for
> simplicity, the restart hook is implemented here directly in the main
> machine source file.
> 
> Overall structure (separate setup/restart) functions derived from the
> picoxcell ARM support.
> 
> Watchdog register IO sequence taken from code by Simon Arlott. Note that
> the watchdog module is not documented in BCM2835-ARM-Peripherals.pdf.
> 
> Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
> ---
>  .../bindings/watchdog/brcm,bcm2835-pm-wdog.txt     |   13 ++++++
>  arch/arm/boot/dts/bcm2835.dtsi                     |    5 +++
>  arch/arm/mach-bcm2835/bcm2835.c                    |   46 ++++++++++++++++++++
>  3 files changed, 64 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt b/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt
> new file mode 100644
> index 0000000..03138e6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt
> @@ -0,0 +1,13 @@
> +BCM2835 Watchdog timer
> +
> +Required properties:
> +
> +- compatible : should be "brcm,bcm2835-pm-wdog"
> +- reg : Specifies base physical address and size of the registers.
> +
> +Example:
> +
> +intc: interrupt-controller {
> +	compatible = "brcm,bcm2835-pm-wdog";
it's seems everyone use -wdt

Best Regards,
J.


From swarren at wwwdotorg.org  Fri Sep 28 10:56:00 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Fri, 28 Sep 2012 08:56:00 -0600
Subject: [PATCH] ARM: bcm2835: implement machine restart hook
In-Reply-To: <20120928121518.7f88196b@skate>
References: <1348805280-7647-1-git-send-email-swarren@wwwdotorg.org>
 <20120928121518.7f88196b@skate>
Message-ID: <5065BA80.1000001@wwwdotorg.org>

On 09/28/2012 04:15 AM, Thomas Petazzoni wrote:
> Stephen,
> 
> On Thu, 27 Sep 2012 22:08:00 -0600, Stephen Warren wrote:
> 
>> +intc: interrupt-controller {
> 
> Isn't this a bizarre name for a watchdog device?

Yes, certainly! It looks like I only made this cut/paste mistake in the
binding document, which is why the code actually worked...

>> +	compatible = "brcm,bcm2835-pm-wdog";
>> +	reg = <0x7e100000 0x28>;
>> +};



From swarren at wwwdotorg.org  Fri Sep 28 10:57:20 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Fri, 28 Sep 2012 08:57:20 -0600
Subject: [PATCH] ARM: bcm2835: implement machine restart hook
In-Reply-To: <20120928103140.GZ17667@game.jcrosoft.org>
References: <1348805280-7647-1-git-send-email-swarren@wwwdotorg.org>
 <20120928103140.GZ17667@game.jcrosoft.org>
Message-ID: <5065BAD0.1030105@wwwdotorg.org>

On 09/28/2012 04:31 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 22:08 Thu 27 Sep     , Stephen Warren wrote:
>> Implement the machine restart hook using the SoC's watchdog timer module.
>> To support this, define a DT binding for the watchdog module, and add it
>> to the device tree.
>>
>> The downstream rpi-split branch contains a full watchdog timer driver
>> implementation, which also implements the restart hook. However, the
>> restart function is largely separate from the watchdog driver, so for
>> simplicity, the restart hook is implemented here directly in the main
>> machine source file.

>> +++ b/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt

>> +Example:
>> +
>> +intc: interrupt-controller {
>> +	compatible = "brcm,bcm2835-pm-wdog";
>
> it's seems everyone use -wdt

That is true. "-wdog" is what was in the downstream patch, but I guess
it makes sense to fix it up to be consistent with everything already in
the kernel.



From swarren at wwwdotorg.org  Sat Sep 29 01:17:15 2012
From: swarren at wwwdotorg.org (Stephen Warren)
Date: Fri, 28 Sep 2012 23:17:15 -0600
Subject: [PATCH V2] ARM: bcm2835: implement machine restart hook
Message-ID: <1348895835-18245-1-git-send-email-swarren@wwwdotorg.org>

Implement the machine restart hook using the SoC's watchdog timer module.
To support this, define a DT binding for the watchdog module, and add it
to the device tree.

The downstream rpi-split branch contains a full watchdog timer driver
implementation, which also implements the restart hook. However, the
restart function is largely separate from the watchdog driver, so for
simplicity, the restart hook is implemented here directly in the main
machine source file.

Overall structure (separate setup/restart) functions derived from the
picoxcell ARM support.

Watchdog register IO sequence taken from code by Simon Arlott. Note that
the watchdog module is not documented in BCM2835-ARM-Peripherals.pdf.

Signed-off-by: Stephen Warren <swarren at wwwdotorg.org>
---
v2:
* s/-wdog/-wdt/ in compatible value given precedent in other bindings.
* Fix node name in DT binding example.
---
 .../bindings/watchdog/brcm,bcm2835-pm-wdog.txt     |   13 ++++++
 arch/arm/boot/dts/bcm2835.dtsi                     |    5 +++
 arch/arm/mach-bcm2835/bcm2835.c                    |   46 ++++++++++++++++++++
 3 files changed, 64 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt

diff --git a/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt b/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt
new file mode 100644
index 0000000..d209366
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt
@@ -0,0 +1,13 @@
+BCM2835 Watchdog timer
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-pm-wdt"
+- reg : Specifies base physical address and size of the registers.
+
+Example:
+
+watchdog {
+	compatible = "brcm,bcm2835-pm-wdt";
+	reg = <0x7e100000 0x28>;
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 0b61939..5c5cbaf 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -29,6 +29,11 @@
 			#interrupt-cells = <2>;
 		};
 
+		watchdog {
+			compatible = "brcm,bcm2835-pm-wdt";
+			reg = <0x7e100000 0x28>;
+		};
+
 		uart at 20201000 {
 			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 			reg = <0x7e201000 0x1000>;
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index f6fea49..c4dd210 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -12,8 +12,10 @@
  * GNU General Public License for more details.
  */
 
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/irqchip/bcm2835.h>
+#include <linux/of_address.h>
 #include <linux/of_platform.h>
 #include <linux/bcm2835_timer.h>
 #include <linux/clk/bcm2835.h>
@@ -23,6 +25,48 @@
 
 #include <mach/bcm2835_soc.h>
 
+#define PM_RSTC				0x1c
+#define PM_WDOG				0x24
+
+#define PM_PASSWORD			0x5a000000
+#define PM_RSTC_WRCFG_MASK		0x00000030
+#define PM_RSTC_WRCFG_FULL_RESET	0x00000020
+
+static void __iomem *wdt_regs;
+
+/*
+ * The machine restart method can be called from an atomic context so we won't
+ * be able to ioremap the regs then.
+ */
+static void bcm2835_setup_restart(void)
+{
+	struct device_node *np = of_find_compatible_node(NULL, NULL,
+						"brcm,bcm2835-pm-wdt");
+	if (WARN(!np, "unable to setup watchdog restart"))
+		return;
+
+	wdt_regs = of_iomap(np, 0);
+	WARN(!wdt_regs, "failed to remap watchdog regs");
+}
+
+static void bcm2835_restart(char mode, const char *cmd)
+{
+	u32 val;
+
+	if (!wdt_regs)
+		return;
+
+	/* use a timeout of 10 ticks (~150us) */
+	writel_relaxed(10 | PM_PASSWORD, wdt_regs + PM_WDOG);
+	val = readl_relaxed(wdt_regs + PM_RSTC);
+	val &= ~PM_RSTC_WRCFG_MASK;
+	val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
+	writel_relaxed(val, wdt_regs + PM_RSTC);
+
+	/* No sleeping, possibly atomic. */
+	mdelay(1);
+}
+
 static struct map_desc io_map __initdata = {
 	.virtual = BCM2835_PERIPH_VIRT,
 	.pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),
@@ -39,6 +83,7 @@ void __init bcm2835_init(void)
 {
 	int ret;
 
+	bcm2835_setup_restart();
 	bcm2835_init_clocks();
 
 	ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
@@ -60,5 +105,6 @@ DT_MACHINE_START(BCM2835, "BCM2835")
 	.handle_irq = bcm2835_handle_irq,
 	.init_machine = bcm2835_init,
 	.timer = &bcm2835_timer,
+	.restart = bcm2835_restart,
 	.dt_compat = bcm2835_compat
 MACHINE_END
-- 
1.7.9.5



