[PATCH v2 2/5] media: rockchip: rkcif: add a register index for the MIPI capture size
Michael Riesch
michael.riesch at collabora.com
Thu Oct 1 08:24:03 PDT 2026
Hi Amin,
Thanks for the patch!
On 9/21/26 17:29, Amin Gattout wrote:
> The RK3568 and RK3588 variants configure the MIPI capture size in the
> ID_CTRL1 register. The RK3576 has a dedicated ID_SET_SIZE register
> instead.
>
> Add a register index for the capture size and write it through that
> index, in preparation for the RK3576 support. The RK3568 and RK3588
> mark the index as unsupported, so the write is a no operation for them
> and their behavior is unchanged.
>
> Signed-off-by: Amin Gattout <amin.gattout at gmail.com>
Reviewed-by: Michael Riesch <michael.riesch at collabora.com>
Best regards,
Michael
> ---
> drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c | 10 ++++++++++
> drivers/media/platform/rockchip/rkcif/rkcif-regs.h | 1 +
> 2 files changed, 11 insertions(+)
>
> diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c
> index bc9518f8db50..e0acb9049ca1 100644
> --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c
> +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c
> @@ -438,6 +438,7 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_data = {
> [RKCIF_MIPI_FRAME1_VLW_Y] = 0x38,
> [RKCIF_MIPI_FRAME1_VLW_UV] = 0x40,
> [RKCIF_MIPI_CROP_START] = 0xbc,
> + [RKCIF_MIPI_SET_SIZE] = RKCIF_REGISTER_NOTSUPPORTED,
> },
> [RKCIF_ID1] = {
> [RKCIF_MIPI_CTRL0] = 0x08,
> @@ -451,6 +452,7 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_data = {
> [RKCIF_MIPI_FRAME1_VLW_Y] = 0x58,
> [RKCIF_MIPI_FRAME1_VLW_UV] = 0x60,
> [RKCIF_MIPI_CROP_START] = 0xc0,
> + [RKCIF_MIPI_SET_SIZE] = RKCIF_REGISTER_NOTSUPPORTED,
> },
> [RKCIF_ID2] = {
> [RKCIF_MIPI_CTRL0] = 0x10,
> @@ -464,6 +466,7 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_data = {
> [RKCIF_MIPI_FRAME1_VLW_Y] = 0x78,
> [RKCIF_MIPI_FRAME1_VLW_UV] = 0x80,
> [RKCIF_MIPI_CROP_START] = 0xc4,
> + [RKCIF_MIPI_SET_SIZE] = RKCIF_REGISTER_NOTSUPPORTED,
> },
> [RKCIF_ID3] = {
> [RKCIF_MIPI_CTRL0] = 0x18,
> @@ -477,6 +480,7 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_data = {
> [RKCIF_MIPI_FRAME1_VLW_Y] = 0x98,
> [RKCIF_MIPI_FRAME1_VLW_UV] = 0xa0,
> [RKCIF_MIPI_CROP_START] = 0xc8,
> + [RKCIF_MIPI_SET_SIZE] = RKCIF_REGISTER_NOTSUPPORTED,
> },
> },
> .blocks = {
> @@ -549,6 +553,7 @@ const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data = {
> [RKCIF_MIPI_FRAME1_VLW_Y] = RKCIF_REGISTER_NOTSUPPORTED,
> [RKCIF_MIPI_FRAME1_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
> [RKCIF_MIPI_CROP_START] = 0x8c,
> + [RKCIF_MIPI_SET_SIZE] = RKCIF_REGISTER_NOTSUPPORTED,
> },
> [RKCIF_ID1] = {
> [RKCIF_MIPI_CTRL0] = 0x08,
> @@ -562,6 +567,7 @@ const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data = {
> [RKCIF_MIPI_FRAME1_VLW_Y] = RKCIF_REGISTER_NOTSUPPORTED,
> [RKCIF_MIPI_FRAME1_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
> [RKCIF_MIPI_CROP_START] = 0x90,
> + [RKCIF_MIPI_SET_SIZE] = RKCIF_REGISTER_NOTSUPPORTED,
> },
> [RKCIF_ID2] = {
> [RKCIF_MIPI_CTRL0] = 0x10,
> @@ -575,6 +581,7 @@ const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data = {
> [RKCIF_MIPI_FRAME1_VLW_Y] = RKCIF_REGISTER_NOTSUPPORTED,
> [RKCIF_MIPI_FRAME1_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
> [RKCIF_MIPI_CROP_START] = 0x94,
> + [RKCIF_MIPI_SET_SIZE] = RKCIF_REGISTER_NOTSUPPORTED,
> },
> [RKCIF_ID3] = {
> [RKCIF_MIPI_CTRL0] = 0x18,
> @@ -588,6 +595,7 @@ const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data = {
> [RKCIF_MIPI_FRAME1_VLW_Y] = RKCIF_REGISTER_NOTSUPPORTED,
> [RKCIF_MIPI_FRAME1_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
> [RKCIF_MIPI_CROP_START] = 0x98,
> + [RKCIF_MIPI_SET_SIZE] = RKCIF_REGISTER_NOTSUPPORTED,
> },
> },
> .blocks = {
> @@ -759,6 +767,8 @@ static int rkcif_mipi_start_streaming(struct rkcif_stream *stream)
> rkcif_mipi_stream_write(stream, RKCIF_MIPI_FRAME0_VLW_UV, vlw);
> rkcif_mipi_stream_write(stream, RKCIF_MIPI_FRAME1_VLW_UV, vlw);
> rkcif_mipi_stream_write(stream, RKCIF_MIPI_CROP_START, 0x0);
> + rkcif_mipi_stream_write(stream, RKCIF_MIPI_SET_SIZE,
> + RKCIF_XY_COORD(width, height));
> rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL1, ctrl1);
> rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL0, ctrl0);
>
> diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-regs.h b/drivers/media/platform/rockchip/rkcif/rkcif-regs.h
> index 3cf7ee19de30..0460e963b154 100644
> --- a/drivers/media/platform/rockchip/rkcif/rkcif-regs.h
> +++ b/drivers/media/platform/rockchip/rkcif/rkcif-regs.h
> @@ -147,6 +147,7 @@ enum rkcif_mipi_id_register_index {
> RKCIF_MIPI_FRAME1_VLW_Y,
> RKCIF_MIPI_FRAME1_VLW_UV,
> RKCIF_MIPI_CROP_START,
> + RKCIF_MIPI_SET_SIZE,
> RKCIF_MIPI_ID_REGISTER_MAX
> };
>
>
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