[PATCH 5/5] arm64: dts: rockchip: add the clock of the RK3588 PCIe SMMU
Sebastian Reichel
sebastian.reichel at collabora.com
Tue Nov 10 07:07:00 PST 2026
Hi,
On Tue, Nov 10, 2026 at 07:11:52AM +0000, Arun Iyengar via B4 Relay wrote:
> From: Arun Iyengar <aiyengar1990 at gmail.com>
>
> The PCIe MMU-600 runs from ACLK_MMU_PCIE, which is also the parent of
> the PCIe controllers' master clocks. When no PCIe controller is enabled,
> nothing holds it and it gets gated as unused after boot, while
> arm-smmu-v3 is still bound to the SMMU.
>
> Describe the clock, so that the SMMU driver keeps it running.
>
> Fixes: da92d3dfc871 ("arm64: dts: rockchip: enable the mmu600_pcie IOMMU on the rk3588 SoC")
> Signed-off-by: Arun Iyengar <aiyengar1990 at gmail.com>
> ---
Reviewed-by: Sebastian Reichel <sebastian.reichel at collabora.com>
Greetings,
-- Sebastian
> arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> index bcd342c025c9..8eed22ca69ab 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> @@ -559,6 +559,7 @@ mmu600_pcie: iommu at fc900000 {
> <GIC_SPI 374 IRQ_TYPE_EDGE_RISING 0>,
> <GIC_SPI 367 IRQ_TYPE_EDGE_RISING 0>;
> interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
> + clocks = <&cru ACLK_MMU_PCIE>;
> #iommu-cells = <1>;
> power-domains = <&power RK3588_PD_PCIE>;
> };
>
> --
> 2.55.0
>
>
>
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