[PATCH 2/5] dt-bindings: iommu: arm,smmu-v3: allow clocks
Sebastian Reichel
sebastian.reichel at collabora.com
Tue Nov 10 06:55:09 PST 2026
Hi,
On Tue, Nov 10, 2026 at 07:11:49AM +0000, Arun Iyengar via B4 Relay wrote:
> From: Arun Iyengar <aiyengar1990 at gmail.com>
>
> Some SoCs feed the SMMUv3 from a clock that the OS controls. On the
> Rockchip RK3588 the MMU-600 for PCIe runs from ACLK_MMU_PCIE, whose only
> other consumers are the PCIe controllers. When no PCIe controller is
> enabled, the clock framework gates it as unused, and the SMMU can no
> longer be accessed.
>
> Allow up to four clocks, so that such a clock can be described and held
> by the SMMU driver.
>
> Signed-off-by: Arun Iyengar <aiyengar1990 at gmail.com>
> ---
This does not explain why a maximum of four clocks is allowed.
Greetings,
-- Sebastian
> Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> index c8f22dfdb1db..f8a74730667c 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> @@ -63,6 +63,13 @@ properties:
>
> msi-parent: true
>
> + clocks:
> + minItems: 1
> + maxItems: 4
> + description:
> + Clocks needed to access the SMMU registers and to keep its translation
> + units running, if they are not managed by firmware.
> +
> power-domains:
> maxItems: 1
>
>
> --
> 2.55.0
>
>
>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-rockchip/attachments/20261110/fd1935d2/attachment.sig>
More information about the Linux-rockchip
mailing list