[PATCH 4/4] arm64: dts: rockchip: Describe the USB3 Type-A connector on Orange Pi 5/5B

[Krzysztof Kozlowski]

On 10/11/2026 08:20, Arun Iyengar via B4 Relay wrote:
> From: Arun Iyengar <aiyengar1990 at gmail.com>
> 
> The upper Type-A port of the Orange Pi 5 and 5B has its USB 2.0 lines
> on USB 2.0 host 1 (EHCI/OHCI) and its SuperSpeed lanes on the
> SuperSpeed-only USB 3.0 host 2 (xHCI). The lower Type-A port is USB 2.0
> only, on host 0.
> 
> Describe the upper port as a usb-a-connector linked to both
> controllers, so that the USB core pairs the EHCI root hub port with the
> xHCI SuperSpeed port. Without that, a USB 3 device plugged in at boot
> is enumerated by the EHCI before the xHCI is up and stays at high
> speed.
> 
> VBUS of the port is not switched (the vendor DT has it on an always-on
> 5 V rail), so it is described as coming from vcc5v0_sys.
> 
> Signed-off-by: Arun Iyengar <aiyengar1990 at gmail.com>
> ---

DTS cannot be combined in this patchset and must be split. Don't mix
patches from independent subsystems when you send something explicitly
targeting only one subsystem.
See also: Documentation/devicetree/bindings/submitting-patches.rst


Best regards,
Krzysztof