[PATCH v6 3/6] arm64: dts: rockchip: describe PCIe RTL8125 Ethernet on CM3588

[Ricardo Pardini via B4 Relay]

From: Ricardo Pardini <ricardo at pardini.net>

The FriendlyElec CM3588 SoM carries one on-board Realtek RTL8125 NIC
behind pcie2x1l2.

Describe the PCI function node and attach an ethernet0 alias, so that
U-Boot's fdt_fixup_ethernet() can fill in its MAC address from its
ethaddr environment.

The node goes in the SoM dtsi, as the RTL8125 sits on the SoM, not on
the CM3588-NAS carrier.

Signed-off-by: Ricardo Pardini <ricardo at pardini.net>
---
 .../boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi     | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi
index 49cf4b85c4e9..d6cff0f5dc86 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi
@@ -18,6 +18,7 @@ / {
 	compatible = "friendlyarm,cm3588", "rockchip,rk3588";
 
 	aliases {
+		ethernet0 = &rtl_eth0;
 		mmc0 = &sdhci;
 		mmc1 = &sdmmc;
 	};
@@ -257,6 +258,20 @@ &pcie2x1l2 {
 	reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
 	vpcie3v3-supply = <&vcc_3v3_pcie20>;
 	status = "okay";
+
+	pcie at 0,0 {
+		reg = <0x400000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+		device_type = "pci";
+		bus-range = <0x41 0x4f>;
+
+		rtl_eth0: ethernet at 0,0 {
+			compatible = "pci10ec,8125";
+			reg = <0x410000 0 0 0 0>;
+		};
+	};
 };
 
 &pd_gpu {

-- 
2.47.3