[PATCH v3 2/2] arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO

[Andrew Lunn]

> +&gmac0 {
> +	/* The RX delay is added by the PHY, the TX delay by the MAC below. */
> +	phy-mode = "rgmii-rxid";

Please read.

https://elixir.bootlin.com/linux/v6.15/source/Documentation/devicetree/bindings/net/ethernet-controller.yaml#L287

> +	clock_in_out = "output";
> +	clocks = <&cru CLK_GMAC0_125M_SRC>, <&cru CLK_GMAC0_RMII_CRU>,
> +		 <&cru PCLK_GMAC0>, <&cru ACLK_GMAC0>,
> +		 <&cru CLK_GMAC0_PTP_REF>, <&cru REFCLKO25M_GMAC0_OUT>;
> +	clock-names = "stmmaceth", "clk_mac_ref", "pclk_mac", "aclk_mac",
> +		      "ptp_ref", "clk_mac_refout";
> +	tx_delay = <0x21>;
> +	rx_delay = <0x00>;

Try setting phy-mode to rgmii-id, and these delays to 0, or removing
them.

	Andrew