[PATCH v3 03/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing pcie rst pinctrl

[Diederik de Haas]

Hi Joachim,

On Mon Jul 13, 2026 at 10:30 PM CEST, Joachim Eastwood via B4 Relay wrote:
> From: Joachim Eastwood <joachim.eastwood at gmail.com>
>
> The pins are used as reset-gpios but not reserved through pinctrl.
>
> Fixes: f3c6526d6fb2 ("arm64: dts: rockchip: Convert dts files used as parents to dtsi files")
> Signed-off-by: Joachim Eastwood <joachim.eastwood at gmail.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
> index 67e284a15c35..8df6e1a21180 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
> @@ -360,12 +360,16 @@ rgmii_phy1: ethernet-phy at 1 {
>  };
>  
>  &pcie2x1l1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie2_1_rst>;
>  	reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
>  	vpcie3v3-supply = <&vcc_3v3_pcie20>;
>  	status = "okay";
>  };
>  
>  &pcie2x1l2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie2_2_rst>;
>  	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
>  	vpcie3v3-supply = <&vcc_3v3_pcie20>;
>  	status = "okay";
> @@ -420,6 +424,16 @@ rtc_int: rtc-int {
>  		};
>  	};
>  
> +	pcie {
> +		pcie2_1_rst: pcie2-1-rst {

``pcie20x1_1_perstn_m2`` to match the schematic name?

> +			rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +
> +		pcie2_2_rst: pcie2-2-rst {

And ``pcie20x1_2_perstn_m0`` here?

Cheers,
  Diederik

> +			rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
> +		};
> +	};
> +
>  	sdmmc {
>  		sdmmc_det_pin: sdmmc-det-pin {
>  			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;