[PATCH v5 6/6] arm64: dts: rockchip: Add cooling fan to ROCK 4D

[Damon Ding]

Hi Nicolas,

On 4/20/2026 9:52 PM, Nicolas Frattaroli wrote:
> The ROCK 4D has a header to connect a small cooling fan. This fan is
> driven by one of the SoC's PWM outputs driving a transistor, that in
> turn controls the fan's power.
> 
> With the introduction of PWM support, add a description of this cooling
> fan, as well as the additional trips and cooling-maps for it.
> 
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli at collabora.com>
> ---
>   arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 50 +++++++++++++++++++++++++
>   1 file changed, 50 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
> index 899a84b1fbf9..2d5ede010ad0 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
> @@ -45,6 +45,14 @@ rfkill {
>   		shutdown-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
>   	};
>   
> +	fan: pwm-fan {
> +		compatible = "pwm-fan";
> +		cooling-levels = <0 180 205 230 255>;
> +		fan-supply = <&vcc_5v0_sys>;
> +		pwms = <&pwm2_8ch_5 0 60000 0>;
> +		#cooling-cells = <2>;
> +	};
> +
>   	leds: leds {
>   		compatible = "gpio-leds";
>   		pinctrl-names = "default";
> @@ -711,6 +719,36 @@ rgmii_phy0: ethernet-phy at 1 {
>   	};
>   };
>   
> +&package_thermal {
> +	polling-delay = <100>;
> +
> +	trips {
> +		package_fan0: package-fan0 {
> +			temperature = <50000>;
> +			hysteresis = <2000>;
> +			type = "active";
> +		};
> +
> +		package_fan1: package-fan1 {
> +			temperature = <60000>;
> +			hysteresis = <2000>;
> +			type = "active";
> +		};
> +	};
> +
> +	cooling-maps {
> +		map1 {
> +			trip = <&package_fan0>;
> +			cooling-device = <&fan THERMAL_NO_LIMIT 1>;
> +		};
> +
> +		map2 {
> +			trip = <&package_fan1>;
> +			cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> +
>   &pcie0 {
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&pcie_reset>;
> @@ -720,6 +758,13 @@ &pcie0 {
>   };
>   
>   &pinctrl {
> +	fan {
> +		fan_pwm: fan-pwm {
> +			rockchip,pins =
> +				<4 RK_PC5 14 &pcfg_pull_down_drv_level_5>;
> +		};
> +	};
> +
>   	hym8563 {
>   		hym8563_int: hym8563-int {
>   			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
> @@ -770,6 +815,11 @@ wifi_en_h: wifi-en-h {
>   	};
>   };
>   
> +&pwm2_8ch_5 {
> +	pinctrl-0 = <&fan_pwm>;

May I ask why the pinctrl does not directly use &pwm2m1_ch5?

Is it because the default pin configuration cannot meet the requirements 
of the fan?

> +	status = "okay";
> +};
> +
>   &sai6 {
>   	status = "okay";
>   };
> 

Best regards,
Damon