[PATCH v2 1/2] PCI/ASPM: Override the ASPM and Clock PM states set by BIOS for devicetree platforms

[Hongxing Zhu]

> -----Original Message-----
> From: Bjorn Helgaas <helgaas at kernel.org>
> Sent: 2025Äê10ÔÂ16ÈÕ 7:31
> To: Shawn Lin <shawn.lin at rock-chips.com>
> Cc: Niklas Cassel <cassel at kernel.org>; Manivannan Sadhasivam
> <mani at kernel.org>; manivannan.sadhasivam at oss.qualcomm.com; Bjorn
> Helgaas <bhelgaas at google.com>; Lorenzo Pieralisi <lpieralisi at kernel.org>;
> Krzysztof Wilczy¨½ski <kwilczynski at kernel.org>; Rob Herring
> <robh at kernel.org>; linux-pci at vger.kernel.org; linux-kernel at vger.kernel.org;
> linux-arm-msm at vger.kernel.org; David E. Box <david.e.box at linux.intel.com>;
> Kai-Heng Feng <kai.heng.feng at canonical.com>; Rafael J. Wysocki
> <rafael at kernel.org>; Heiner Kallweit <hkallweit1 at gmail.com>; Chia-Lin Kao
> <acelan.kao at canonical.com>; Dragan Simic <dsimic at manjaro.org>;
> linux-rockchip at lists.infradead.org; regressions at lists.linux.dev; FUKAUMI Naoki
> <naoki at radxa.com>
> Subject: Re: [PATCH v2 1/2] PCI/ASPM: Override the ASPM and Clock PM states
> set by BIOS for devicetree platforms
> 
> On Wed, Oct 15, 2025 at 09:00:41PM +0800, Shawn Lin wrote:
> > ...
> 
> > For now, this is a acceptable option if default ASPM policy enable
> > L1ss w/o checking if the HW could supports it... But how about adding
> > supports-clkreq stuff to upstream host driver directly? That would
> > help folks enable L1ss if the HW is ready and they just need adding
> > property to the DT.
> > ...
> 
> > The L1ss support is quite strict and need several steps to check, so
> > we didn't add supports-clkreq for them unless the HW is ready to go...
> >
> > For adding supports of L1ss,
> > [1] the HW should support CLKREQ#, expecially for PCIe3.0 case on
> > Rockchip SoCs , since both  CLKREQ# of RC and EP should connect to the
> > 100MHz crystal generator's enable pin, as L1.2 need to disable refclk
> > as well. If the enable pin is high active, the HW even need a invertor....
> >
> > [2] define proper clkreq iomux to pinctrl of pcie node [3] make sure
> > the devices work fine with L1ss.(It's hard to check the slot case with
> > random devices in the wild ) [4] add supports-clkreq to the DT and
> > enable CONFIG_PCIEASPM_POWER_SUPERSAVE
> 
> I don't understand the details of the supports-clkreq issue.
> 
> If we need to add supports-clkreq to devicetree, I want to understand why we
> need it there when we don't seem to need it for ACPI systems.
> 
> Generally the OS relies on what the hardware advertises, e.g., in Link
> Capabilities and the L1 PM Substates Capability, and what is available from
> firmware, e.g., the ACPI _DSM for Latency Tolerance Reporting.
Hi Bjorn:
Yes, it is. The L1 PM Substates support can be broadcasted by the according
 Capabilities of PCIe controller.
But, this feature is still relied on the CLKREQ# signal connection on the
 board/device hardware designs too.
Maybe the "supports-clkreq" property is used to guarantee that the hardware
 designs of CLKREQ# on board/device meet the requirements of L1 PM Substates.

https://lore.kernel.org/imx/20251015030428.2980427-1-hongxing.zhu@nxp.com/
This is the jam I encountered, especially on the second slot of i.MX95
 19x19 EVK board.

Best Regards
Richard Zhu
> 
> On the ACPI side, I don't think we get any specific information about CLKREQ#.
> Can somebody explain why we do need it on the devicetree side?
> 
> Bjorn