[RFC v1 0/5] Fix some register offset as per RK3399 TRM part 2
Shawn Lin
shawn.lin at rock-chips.com
Mon Nov 17 16:54:26 PST 2025
Hi Anand,
在 2025/11/18 星期二 2:10, Anand Moon 写道:
> In order to enable ASPM we need to fix the register offset as
> RK3399 TRM part 2 - PCIe Controller.
>
> Tested on Radxa Rock Pi 4b.
>
I checked your patch, and it looks like indeed we made some mistakes
here. Could you add fixes tag for each?
BTW, regarding to patch 1, I think you should leave out ASPM part, that
should be another topic after these fixes.
> Thanks
> -Anand
>
> Anand Moon (5):
> PCI: rockchip: Fix Link Control register offset and enable ASPM/CLKREQ
> PCI: rockchip: Fix Device Control register offset for Max payload size
> PCI: rockchip: Fix Slot Capability Register offset for slot power
> limit
> PCI: rockchip: Fix Link Control and Status Register 2 for target link
> speed
> PCI: rockchip: Fix Linkwidth Control Register offset for Retrain Link
>
> drivers/pci/controller/pcie-rockchip-host.c | 31 +++++++++++----------
> drivers/pci/controller/pcie-rockchip.h | 5 ++++
> 2 files changed, 21 insertions(+), 15 deletions(-)
>
>
> base-commit: e7c375b181600caf135cfd03eadbc45eb530f2cb
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