[PATCH 2/2] mmc: sdhci-of-dwcmshc: reduce CIT for better performance

Ulf Hansson ulf.hansson at linaro.org
Wed Nov 12 04:03:44 PST 2025


+ cqhci maintainers (Adrian, Asutosh, Ritesh)

On Wed, 12 Nov 2025 at 08:44, Shawn Lin <shawn.lin at rock-chips.com> wrote:
>
> CQHCI_SSC1.CIT indicates to the CQE the polling period to use for
> periodic SEND_QUEUE_STATUS (CMD13) polling. Some eMMCs have only one
> hardware queue, and CMD13 can only query one slot at a time for data
> transmission, which cannot be processed in parallel. Modifying the
> CMD13 query interval can increase the query frequency and improve
> random write performance.
>
> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>

No strong opinion on this, but I looped in the cqhci maintainers to
allow them to chime in.

Kind regards
Uffe

> ---
>
>  drivers/mmc/host/cqhci.h            | 1 +
>  drivers/mmc/host/sdhci-of-dwcmshc.c | 5 +++++
>  2 files changed, 6 insertions(+)
>
> diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
> index ce189a1..3668856 100644
> --- a/drivers/mmc/host/cqhci.h
> +++ b/drivers/mmc/host/cqhci.h
> @@ -93,6 +93,7 @@
>  /* send status config 1 */
>  #define CQHCI_SSC1                     0x40
>  #define CQHCI_SSC1_CBC_MASK            GENMASK(19, 16)
> +#define CQHCI_SSC1_CIT_MASK            GENMASK(15, 0)
>
>  /* send status config 2 */
>  #define CQHCI_SSC2                     0x44
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index e276a4e..cad5165 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -631,6 +631,11 @@ static void rk35xx_sdhci_cqe_pre_enable(struct mmc_host *mmc)
>         struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host);
>         u32 reg;
>
> +       /* Set Send Status Command Idle Timer to 10.66us (256 * 1 / 24) */
> +       reg = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_SSC1);
> +       reg = (reg & ~CQHCI_SSC1_CIT_MASK) | 0x0100;
> +       sdhci_writel(host, reg, dwc_priv->vendor_specific_area2 + CQHCI_SSC1);
> +
>         reg = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_CFG);
>         reg |= CQHCI_ENABLE;
>         sdhci_writel(host, reg, dwc_priv->vendor_specific_area2 + CQHCI_CFG);
> --
> 2.7.4
>



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