[PATCH] mmc: dw_mmc-rockchip: Add memory clock auto-gating support
Shawn Lin
shawn.lin at rock-chips.com
Tue Nov 11 16:45:03 PST 2025
在 2025/11/12 星期三 0:55, Ulf Hansson 写道:
> On Tue, 4 Nov 2025 at 08:41, Shawn Lin <shawn.lin at rock-chips.com> wrote:
>>
>> Per design recommendations, the memory clock can be gated when there
>> is no in-flight transfer, which helps save power. This feature is
>> introduced alongside internal phase support, and this patch enables it.
>
> Just to make sure, does this work if the controller is used for SDIO
> and has SDIO irqs enabled?
>
> Or perhaps that is taken care of in dw_mci_prepare_sdio_irq()?
>
Yes, it works for SDIO case too.
>>
>> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>
>
> Kind regards
> Uffe
>
>> ---
>>
>> drivers/mmc/host/dw_mmc-rockchip.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
>> index 6813549..62c68cd 100644
>> --- a/drivers/mmc/host/dw_mmc-rockchip.c
>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
>> @@ -19,6 +19,8 @@
>> #define RK3288_CLKGEN_DIV 2
>> #define SDMMC_TIMING_CON0 0x130
>> #define SDMMC_TIMING_CON1 0x134
>> +#define SDMMC_MISC_CON 0x138
>> +#define MEM_CLK_AUTOGATE_ENABLE BIT(5)
>> #define ROCKCHIP_MMC_DELAY_SEL BIT(10)
>> #define ROCKCHIP_MMC_DEGREE_MASK 0x3
>> #define ROCKCHIP_MMC_DEGREE_OFFSET 1
>> @@ -470,6 +472,7 @@ static int dw_mci_rk3576_parse_dt(struct dw_mci *host)
>>
>> static int dw_mci_rockchip_init(struct dw_mci *host)
>> {
>> + struct dw_mci_rockchip_priv_data *priv = host->priv;
>> int ret, i;
>>
>> /* It is slot 8 on Rockchip SoCs */
>> @@ -494,6 +497,9 @@ static int dw_mci_rockchip_init(struct dw_mci *host)
>> dev_warn(host->dev, "no valid minimum freq: %d\n", ret);
>> }
>>
>> + if (priv->internal_phase)
>> + mci_writel(host, MISC_CON, MEM_CLK_AUTOGATE_ENABLE);
>> +
>> return 0;
>> }
>>
>> --
>> 2.7.4
>>
>
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