[PATCH 3/3] drm/rockchip: dw_hdmi: avoid overflow of clock rate in dw_hdmi_rockchip_encoder_mode_set()

[Karina Yankevich]

Conversion of clock frequency from kHz to Hz in
dw_hdmi_rockchip_encoder_mode_set() can lead to integer overflow,
since type of drm_display_mode::clock is 'int'. Fix it by using
1000UL multiplier to avoid overflow at least on 64-bit arches.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Fixes: 5e3bc6d1ab48 ("drm/rockchip: dw_hdmi: introduce the VPLL clock setting")
Signed-off-by: Karina Yankevich <k.yankevich at omp.ru>
Reviewed-by: Sergey Shtylyov <s.shtylyov at omp.ru>
---
 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 727cdf768161..ca31c2a4e440 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -277,7 +277,7 @@ static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder,
 {
 	struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
 
-	clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000);
+	clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000UL);
 }
 
 static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
-- 
2.34.1