[PATCH v7 4/4] phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal
neil.armstrong at linaro.org
neil.armstrong at linaro.org
Mon Jun 30 01:49:25 PDT 2025
On 29/06/2025 14:48, Geraldo Nascimento wrote:
> pcie_conf is used to touch TEST_WRITE strobe signal. This signal should
> be enabled, a little time waited, and then disabled. Current code clearly
> was copy-pasted and never disables the strobe signal. Adjust the define.
> While at it, remove PHY_CFG_RD_MASK which has been unused since
> 64cdc0360811 ("phy: rockchip-pcie: remove unused phy_rd_cfg function").
>
> Signed-off-by: Geraldo Nascimento <geraldogabriel at gmail.com>
> ---
> drivers/phy/rockchip/phy-rockchip-pcie.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c
> index f22ffb41cdc2..4e2dfd01adf2 100644
> --- a/drivers/phy/rockchip/phy-rockchip-pcie.c
> +++ b/drivers/phy/rockchip/phy-rockchip-pcie.c
> @@ -30,9 +30,8 @@
> #define PHY_CFG_ADDR_SHIFT 1
> #define PHY_CFG_DATA_MASK 0xf
> #define PHY_CFG_ADDR_MASK 0x3f
> -#define PHY_CFG_RD_MASK 0x3ff
> #define PHY_CFG_WR_ENABLE 1
> -#define PHY_CFG_WR_DISABLE 1
> +#define PHY_CFG_WR_DISABLE 0
> #define PHY_CFG_WR_SHIFT 0
> #define PHY_CFG_WR_MASK 1
> #define PHY_CFG_PLL_LOCK 0x10
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
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