[PATCH 3/4] drm/panel: himax-hx8394: Add Support for Huiling hl055fhav028c

[Chris Morgan]

On Thu, Jun 05, 2025 at 01:54:50PM +0200, Diederik de Haas wrote:
> On Tue Jun 3, 2025 at 9:39 PM CEST, Chris Morgan wrote:
> > From: Chris Morgan <macromorgan at hotmail.com>
> >
> > Add support for the Huiling hl055fhav028c panel as used on the
> > Gameforce Ace handheld gaming console. This panel uses a Himax HX8399C
> > display controller and requires a sparsely documented vendor provided
> > init sequence. The display resolution is 1080x1920 and is 70mm by 127mm
> > as stated in the manufacturer's documentation.
> >
> > Signed-off-by: Chris Morgan <macromorgan at hotmail.com>
> > ---
> >  drivers/gpu/drm/panel/panel-himax-hx8394.c | 142 +++++++++++++++++++++
> >  1 file changed, 142 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/panel/panel-himax-hx8394.c b/drivers/gpu/drm/panel/panel-himax-hx8394.c
> > index ff994bf0e3cc..16e450b156b7 100644
> > --- a/drivers/gpu/drm/panel/panel-himax-hx8394.c
> > +++ b/drivers/gpu/drm/panel/panel-himax-hx8394.c
> > @@ -477,6 +477,147 @@ static const struct hx8394_panel_desc mchp_ac40t08a_desc = {
> >  	.init_sequence = mchp_ac40t08a_init_sequence,
> >  };
> > <snip>
> > +
> > +static const struct drm_display_mode hl055fhav028c_mode = {
> > +	.hdisplay	= 1080,
> > +	.hsync_start	= 1080 + 32,
> > +	.hsync_end	= 1080 + 32 + 8,
> > +	.htotal		= 1080 + 32 + 8 + 32,
> > +	.vdisplay	= 1920,
> > +	.vsync_start	= 1920 + 16,
> > +	.vsync_end	= 1920 + 16 + 2,
> > +	.vtotal		= 1920 + 16 + 2 + 14,
> 
> Shouldn't this be 's/14/16/' ?
> 
> Cheers,
>   Diederik
> 

With the exception of the pixel clock, these are the values from the
manufacturer. I did increase the pixel clock from 124MHz to 135MHz so
the panel would run at ~60hz. After extensive testing I can confirm
a 135MHz pixel clock works well for this panel which is why I am
using that value.

Thank you,
Chris

> > +	.clock		= 134920,
> > +	.flags		= DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> > +	.width_mm	= 70,
> > +	.height_mm	= 127,
> > +};
> > +
> > +static const struct hx8394_panel_desc hl055fhav028c_desc = {
> > +	.mode = &hl055fhav028c_mode,
> > +	.lanes = 4,
> > +	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST,
> > +	.format = MIPI_DSI_FMT_RGB888,
> > +	.init_sequence = hl055fhav028c_init_sequence,
> > +};
> > +
> >  static int hx8394_enable(struct drm_panel *panel)
> >  {
> >  	struct hx8394 *ctx = panel_to_hx8394(panel);
> > @@ -683,6 +824,7 @@ static void hx8394_remove(struct mipi_dsi_device *dsi)
> >  
> >  static const struct of_device_id hx8394_of_match[] = {
> >  	{ .compatible = "hannstar,hsd060bhw4", .data = &hsd060bhw4_desc },
> > +	{ .compatible = "huiling,hl055fhav028c", .data = &hl055fhav028c_desc },
> >  	{ .compatible = "powkiddy,x55-panel", .data = &powkiddy_x55_desc },
> >  	{ .compatible = "microchip,ac40t08a-mipi-panel", .data = &mchp_ac40t08a_desc },
> >  	{ /* sentinel */ }
>