[PATCH v2 1/4] PCI: dw-rockchip: Do not enumerate bus before endpoint devices are ready

Niklas Cassel cassel at kernel.org
Tue Jun 3 07:08:15 PDT 2025


On Sat, May 31, 2025 at 12:17:43PM +0530, Manivannan Sadhasivam wrote:
> On Fri, May 30, 2025 at 02:43:47PM -0500, Bjorn Helgaas wrote:
> > On Fri, May 30, 2025 at 07:24:53PM +0200, Niklas Cassel wrote:
> > > On 30 May 2025 19:19:37 CEST, Bjorn Helgaas <helgaas at kernel.org> wrote:
> > > >
> > > >I think all drivers should wait PCIE_T_RRS_READY_MS (100ms) after exit
> > > >from Conventional Reset (if port only supports <= 5.0 GT/s) or after
> > > >link training completes (if port supports > 5.0 GT/s).
> > > >
> > > >> So I don't think this is a device specific issue but rather
> > > >> controller specific.  And this makes the Qcom patch that I dropped a
> > > >> valid one (ofc with change in description).
> > > >
> > > >URL?
> > > 
> > > PATCH 4/4 of this series.
> > 
> > If you mean
> > https://lore.kernel.org/r/20250506073934.433176-10-cassel@kernel.org,
> > that patch merely replaces "100" with PCIE_T_PVPERL_MS, which doesn't
> > fix anything and is valid regardless of this Plextor-related patch
> > ("PCI: dw-rockchip: Do not enumerate bus before endpoint devices are
> > ready").
> 
> It is patch 2/4:
> https://lore.kernel.org/all/20250506073934.433176-8-cassel@kernel.org


Hello all,


I'm getting some mixed messages here.

If I understand Bjorn correctly, he would prefer a NVMe quirk, and looking
at pci/next, PATCH 1/4 has been dropped.

If I understand Mani correctly, he thinks that we should queue up PATCH 1/4
and PATCH 2/4 (although with modified commit messages).

So, what is the consensus here?


As you know, I do not have the (problematic) Plextor drive, so we go with
the quirk option, then we would need to ask Laszlo nicely to retest.
(And to provide the PCI device and PCI vendor ID of his NVMe device so we
can write a quirk.)


Kind regards,
Niklas



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