[PATCH v2] PCI: dw-rockchip: Enable async probe by default
Anand Moon
linux.amoon at gmail.com
Tue Jan 7 03:13:38 PST 2025
Hi Andrewm,
On Mon, 6 Jan 2025 at 19:14, Andrew Lunn <andrew at lunn.ch> wrote:
>
> > As both me an Manivannan said earlier in this thread,
> > PCIe endpoint devices should not be described in device tree
> > (the exception is an FPGA, and when you need to describe devices
> > within the FPGA).
> >
> > So I think that adding a "ethernet-phy" device tree node in this case is
> > wrong (as the Ethernet PHY in this case is integrated in the PCIe connected
> > NIC, and not a discrete component on the SoC).
>
> There are other cases when PCIe devices need a DT node. One is when
> you have an onboard ethernet switch connected to the Ethernet
> device. The switch has to be described in DT, and it needs a phandle
> to the ethernet interface. Hence you need a DT node the phandle points
> to.
>
> You are also making the assumption that the PCIe ethernet interface
> has firmware driving all its subsystems. Which results in every PCIe
> ethernet device manufacture re-inventing what Linux can already do for
> SoC style Ethernet interfaces which do not have firmware, linux drives
> it all. I personally would prefer Linux to drive the hardware, via a
> DT node, since i then don't have to deal with firmware bugs i cannot
> fix, its just Linux all the way down.
>
> Andrew
Ok Thanks for clarifying.
I was just trying to understand the call trace for mdio bus which got
me confused.
[0] https://lore.kernel.org/all/Z3fKkTSFFcU9gQLg@ryzen/
Thanks
-Anand
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