[PATCH v2] arm64: dts: rockchip: add usb typec host support to rk3588-jaguar

[Quentin Schulz]

Hi Heiko,

On 2/18/25 10:10 PM, Heiko Stuebner wrote:
[...]
> @@ -483,6 +583,16 @@ pcie30x4_waken_m0: pcie30x4-waken-m0 {
>   			rockchip,pins = <0 RK_PC7 12 &pcfg_pull_none>;
>   		};
>   	};
> +
> +	usb3 {
> +		cc_int1: cc-int1 {
> +			rockchip,pins = <4 RK_PA3 0 &pcfg_pull_up>;

We actually already have an external HW pull-up for that, see R221 (and 
R227 for CC_INT2). They are pulled up to the same power rail than VDD of 
the FUSB IC so there shouldn't be any issue with an interrupt spuriously 
triggering because the power rail isn't enabled early enough.

Shouldn't we use RK_GPIO instead of 0?

> +		};
> +
> +		cc_int2: cc-int2 {
> +			rockchip,pins = <4 RK_PA4 0 &pcfg_pull_up>;

Ditto.

[...]

> +&usbdp_phy0 {
> +	orientation-switch;
> +	sbu1-dc-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* Q7_USB_C0_SBU1_DC */
> +	sbu2-dc-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; /* Q7_USB_C0_SBU2_DC */
> +	status = "okay";
> +
> +	port {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		usbdp_phy0_typec_ss: endpoint at 0 {
> +			reg = <0>;
> +			remote-endpoint = <&usbc0_ss>;
> +		};
> +
> +		usbdp_phy0_typec_sbu: endpoint at 1 {
> +			reg = <1>;
> +			remote-endpoint = <&usbc0_sbu>;
> +		};
> +	};
> +};
> +
> +&usbdp_phy1 {
> +	orientation-switch;
> +	sbu1-dc-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; /* Q7_USB_C1_SBU1_DC */
> +	sbu2-dc-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; /* Q7_USB_C1_SBU2_DC */

Maybe pinctrl for those too :) ? Ditto for usbdp_phy0 above.

Can we have a comment above usbdp_phy0 to say it's for P11? Ditto for P12?

Looks ok to me otherwise, will start some build to test this on my 
Jaguar to give my T-b tag while you work on the v3 :)

Cheers,
Quentin