[PATCH 2/2] arm64: dts: rockchip: Add rk3399-evb-ind board

[Chaoyi Chen]

Hi Andrew,

On 2025/4/28 20:45, Andrew Lunn wrote:
> On Mon, Apr 28, 2025 at 09:47:34AM +0800, Chaoyi Chen wrote:
>> Hi Andrew,
>>
>> On 2025/4/28 4:42, Andrew Lunn wrote:
>>>> +&gmac {
>>>> +	assigned-clocks = <&cru SCLK_RMII_SRC>;
>>>> +	assigned-clock-parents = <&clkin_gmac>;
>>>> +	pinctrl-names = "default";
>>>> +	pinctrl-0 = <&rgmii_pins>;
>>>> +	clock_in_out = "input";
>>>> +	phy-supply = <&vcc_phy>;
>>>> +	phy-mode = "rgmii";
>>> Does the PCB have extra long clock lines to implement the RGMII 2ns
>>> delay?
>> The 2ns delay of RGMII is implemented inside the RK3399 chip instead of PCB
>> lines, and there are also additional delayline configurations.
> If the PCB does not implement the delay, rgmii is wrong.
>
> If the MAC/PHY pair is implementing the delay, you need to use
> rgmii-id. You can then use additional properties to fine tune the
> delay the MAC/PHY is adding. And the Linux preference is that the PHY
> adds the delay.

The signal path of RK3399 is as follows:

MAC <---> IO <---> PHY

In fact, the delay is added to the path between the MAC and the IO, 
rather than being implemented in the MAC itself. These delay value is 
controlled by the GRF register[0] . These paths are implemented inside 
the SoC and have not yet reached the board level.

According to the document[1], use "rgmii" when "RX and TX delays are 
added by the MAC when required". In addition, currently we can see that 
all RK3399 boards use "rgmii".  Is there anything I missed? Thank you.


[0]: 
https://lore.kernel.org/netdev/1472752204-8924-2-git-send-email-wxt@rock-chips.com/

[1]: 
https://www.kernel.org/doc/Documentation/devicetree/bindings/net/ethernet-controller.yaml

>
> 	Andrew
>
>