[PATCH v3 1/2] arm64: dts: rockchip: fix PCIe2 regulators for Radxa ROCK 3A
FUKAUMI Naoki
naoki at radxa.com
Wed Oct 16 01:19:11 PDT 2024
Hi,
can anyone review this series?
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
On 9/16/24 10:40, FUKAUMI Naoki wrote:
> currently "vcc3v3_pcie" regulator is used for PCIe2 M.2 E key
> connector, but, by schematic[1], it's incorrect. "vcc3v3_wf" regulator
> is correct one. add it and fix related vin-supply.
>
> [1] https://dl.radxa.com/rock3/docs/hw/3a/radxa_rock_3a_v1310_schematic.pdf
>
> Fixes: 0fbbfb0b00d1 ("arm64: dts: rockchip: Enable PCIe controller on rock3a")
> Signed-off-by: FUKAUMI Naoki <naoki at radxa.com>
> ---
> Changes in v3:
> - fix pinctrl just for reset pin as GPIO
> Changes in v2:
> - split patches for PCIe2 and PCIe3
> - fix pinctrl node name to overwrite rk3568-pinctrl.dtsi
> ---
> .../boot/dts/rockchip/rk3568-rock-3a.dts | 24 +++++++++++++------
> 1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
> index 59f1403b4fa56..f94cbddf0f0c2 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
> @@ -136,7 +136,17 @@ vcc3v3_sys: vcc3v3-sys-regulator {
> regulator-boot-on;
> regulator-min-microvolt = <3300000>;
> regulator-max-microvolt = <3300000>;
> - vin-supply = <&vcc12v_dcin>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc3v3_wf: vcc3v3-wf-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_wf";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc3v3_sys>;
> };
>
> vcc5v0_sys: vcc5v0-sys-regulator {
> @@ -592,9 +602,9 @@ rgmii_phy1: ethernet-phy at 0 {
>
> &pcie2x1 {
> pinctrl-names = "default";
> - pinctrl-0 = <&pcie_reset_h>;
> + pinctrl-0 = <&pcie20_perstn_m1>;
> reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
> - vpcie3v3-supply = <&vcc3v3_pcie>;
> + vpcie3v3-supply = <&vcc3v3_wf>;
> status = "okay";
> };
>
> @@ -643,12 +653,12 @@ led_user_en: led_user_en {
> };
>
> pcie {
> - pcie_enable_h: pcie-enable-h {
> - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
> + pcie20_perstn_m1: pcie20-perstn-m1 {
> + rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
> };
>
> - pcie_reset_h: pcie-reset-h {
> - rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
> + pcie_enable_h: pcie-enable-h {
> + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> };
>
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