[PATCH v2 07/14] PCI: dw-rockchip: Fix weird indentation

Manivannan Sadhasivam manivannan.sadhasivam at linaro.org
Sat May 4 10:10:43 PDT 2024


On Tue, Apr 30, 2024 at 02:01:04PM +0200, Niklas Cassel wrote:
> Fix the indentation of rockchip_pcie_{readl,writel}_apb() parameters to
> match the opening parenthesis.
> 
> Signed-off-by: Niklas Cassel <cassel at kernel.org>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>

- Mani

> ---
>  drivers/pci/controller/dwc/pcie-dw-rockchip.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index d6842141d384..1993c430b90c 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -60,14 +60,13 @@ struct rockchip_pcie {
>  	struct irq_domain		*irq_domain;
>  };
>  
> -static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip,
> -					     u32 reg)
> +static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg)
>  {
>  	return readl_relaxed(rockchip->apb_base + reg);
>  }
>  
> -static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip,
> -						u32 val, u32 reg)
> +static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, u32 val,
> +				     u32 reg)
>  {
>  	writel_relaxed(val, rockchip->apb_base + reg);
>  }
> 
> -- 
> 2.44.0
> 

-- 
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