[PATCH v4 09/13] PCI: dw-rockchip: Refactor the driver to prepare for EP mode
Niklas Cassel
cassel at kernel.org
Wed Jun 5 10:57:12 PDT 2024
On Wed, Jun 05, 2024 at 01:36:40PM +0530, Manivannan Sadhasivam wrote:
> On Wed, May 29, 2024 at 10:29:03AM +0200, Niklas Cassel wrote:
> > This refactors the driver to prepare for EP mode.
> > Add of-match data to the existing compatible, and explicitly define it as
> > DW_PCIE_RC_TYPE. This way, we will be able to add EP mode in a follow-up
> > commit in a much less intrusive way, which makes the follup-up commit much
> > easier to review.
> >
> > No functional change intended.
> >
> > Signed-off-by: Niklas Cassel <cassel at kernel.org>
>
> Few nitpicks below. With those addressed,
>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
>
> > ---
(snip)
> > @@ -294,13 +292,35 @@ static const struct dw_pcie_ops dw_pcie_ops = {
> > .start_link = rockchip_pcie_start_link,
> > };
> >
> > +static int rockchip_pcie_configure_rc(struct rockchip_pcie *rockchip)
> > +{
> > + struct dw_pcie_rp *pp;
> > + u32 val;
> > +
> > + /* LTSSM enable control mode */
> > + val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE);
> > + rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
> > +
> > + rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE,
> > + PCIE_CLIENT_GENERAL_CONTROL);
> > +
> > + pp = &rockchip->pci.pp;
> > + pp->ops = &rockchip_pcie_host_ops;
> > +
> > + return dw_pcie_host_init(pp);
> > +}
> > +
> > static int rockchip_pcie_probe(struct platform_device *pdev)
> > {
> > struct device *dev = &pdev->dev;
> > struct rockchip_pcie *rockchip;
> > - struct dw_pcie_rp *pp;
> > + const struct rockchip_pcie_of_data *data;
> > int ret;
> >
> > + data = of_device_get_match_data(dev);
> > + if (!data)
> > + return -EINVAL;
>
> -ENODATA?
-EINVAL seems to be most common:
$ git grep -A 5 of_device_get_match_data drivers/pci/
Kind regards,
Niklas
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