[PATCH v2 00/14] Expand available features on Qnap TS433
Uwe Kleine-König
ukleinek at debian.org
Mon Jul 22 08:20:21 PDT 2024
Hello Heiko,
On Sun, Jul 21, 2024 at 07:37:09PM +0200, Heiko Stuebner wrote:
> Thanks to the nicely supported rk3568, the hardest part for adding things,
> is to pull things from the vendor-kernel and translating them to mainline
> standards.
>
> This series allows the TS433 to use all 4 bays [0], wiggle some LEDs and
> access devices connected to all 3 usb ports.
>
> The device runs stable now and might be usable for actual usage.
>
> There is still a todo-list though:
> - the ethernet mac address for the realtek chip seems correct,
> but the gmac0 interface currently uses a wrong one
> - i2cdetect reports devices on i2c-1 on addresses 54,55,56,57
> model_Q0B20_Q0B30_10_10.conf from the original rescue image labels them
> VPD_MB = I2C:0x54, VPD_BP = I2C:0x56
> the meaning currently being unknown. Some eeprom maybe?
> - The regulator tree is slightly dubious. Everthing seems to follow rk3568
> reference designs, but especially the regulator labeled vcc3v3_sd
> seems to supply some PCIe functionality. So I guess the device's
> schematics will look quite different than the regulators added to the
> vendor devicetree.
> - Quite a bit of functionality is provided by the MCU connected to uart0.
> According to the model.conf there should be fan-control, a number of
> additional LEDs (status,locate,usb?)
Tested-by: Uwe Kleine-König <ukleinek at debian.org>
I have a few suggested changes, instead of describing them in prose in
reply to the individual patches here comes a diff. Feel free to ignore,
in that case I'll care about those when your series landed. It's mostly
about comments and dropping unused labels.
Note I didn't test the rtc change, as I sticked to the Debian kernel and
didn't compile a new one, yet.
Best regards
Uwe
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
index 4213c351faf5..ae6c10c15ca7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
@@ -20,7 +20,7 @@ aliases {
mmc0 = &sdhci;
};
- chosen: chosen {
+ chosen {
stdout-path = "serial2:115200n8";
};
@@ -45,7 +45,7 @@ key-reset {
leds {
compatible = "gpio-leds";
- led_hdd1: led-0 {
+ led-0 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK;
gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
@@ -54,7 +54,7 @@ led_hdd1: led-0 {
pinctrl-0 = <&hdd1_led_pin>;
};
- led_hdd2: led-1 {
+ led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK;
gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>;
@@ -63,7 +63,7 @@ led_hdd2: led-1 {
pinctrl-0 = <&hdd2_led_pin>;
};
- led_hdd3: led-2 {
+ led-2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK;
gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>;
@@ -72,7 +72,7 @@ led_hdd3: led-2 {
pinctrl-0 = <&hdd3_led_pin>;
};
- led_hdd4: led-3 {
+ led-3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK;
gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
@@ -191,6 +191,7 @@ &cpu3 {
cpu-supply = <&vdd_cpu>;
};
+/* lower ethernet jack on the back side */
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
@@ -217,7 +218,7 @@ &gpu {
&i2c0 {
status = "okay";
- rk809: pmic at 20 {
+ pmic at 20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
@@ -238,7 +239,7 @@ rk809: pmic at 20 {
wakeup-source;
regulators {
- vdd_logic: DCDC_REG1 {
+ DCDC_REG1 {
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
@@ -265,7 +266,7 @@ regulator-state-mem {
};
};
- vcc_ddr: DCDC_REG3 {
+ DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
@@ -276,7 +277,7 @@ regulator-state-mem {
};
};
- vdd_npu: DCDC_REG4 {
+ DCDC_REG4 {
regulator-name = "vdd_npu";
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
@@ -300,7 +301,7 @@ regulator-state-mem {
};
};
- vdda0v9_image: LDO_REG1 {
+ LDO_REG1 {
regulator-name = "vdda0v9_image";
regulator-always-on;
regulator-min-microvolt = <900000>;
@@ -311,7 +312,7 @@ regulator-state-mem {
};
};
- vdda_0v9: LDO_REG2 {
+ LDO_REG2 {
regulator-name = "vdda_0v9";
regulator-always-on;
regulator-boot-on;
@@ -323,7 +324,7 @@ regulator-state-mem {
};
};
- vdda0v9_pmu: LDO_REG3 {
+ LDO_REG3 {
regulator-name = "vdda0v9_pmu";
regulator-always-on;
regulator-boot-on;
@@ -336,7 +337,7 @@ regulator-state-mem {
};
};
- vccio_acodec: LDO_REG4 {
+ LDO_REG4 {
regulator-name = "vccio_acodec";
regulator-always-on;
regulator-boot-on;
@@ -348,7 +349,7 @@ regulator-state-mem {
};
};
- vccio_sd: LDO_REG5 {
+ LDO_REG5 {
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
@@ -358,7 +359,7 @@ regulator-state-mem {
};
};
- vcc3v3_pmu: LDO_REG6 {
+ LDO_REG6 {
regulator-name = "vcc3v3_pmu";
regulator-always-on;
regulator-boot-on;
@@ -371,7 +372,7 @@ regulator-state-mem {
};
};
- vcca_1v8: LDO_REG7 {
+ LDO_REG7 {
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
@@ -383,7 +384,7 @@ regulator-state-mem {
};
};
- vcca1v8_pmu: LDO_REG8 {
+ LDO_REG8 {
regulator-name = "vcca1v8_pmu";
regulator-always-on;
regulator-boot-on;
@@ -396,7 +397,7 @@ regulator-state-mem {
};
};
- vcca1v8_image: LDO_REG9 {
+ LDO_REG9 {
regulator-name = "vcca1v8_image";
regulator-always-on;
regulator-min-microvolt = <1800000>;
@@ -407,7 +408,7 @@ regulator-state-mem {
};
};
- vcc_3v3: SWITCH_REG1 {
+ SWITCH_REG1 {
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
@@ -417,7 +418,7 @@ regulator-state-mem {
};
};
- vcc3v3_sd: SWITCH_REG2 {
+ SWITCH_REG2 {
regulator-name = "vcc3v3_sd";
/*
* turning this off, breaks access to both
@@ -431,6 +432,15 @@ regulator-state-mem {
};
};
};
+
+ rtc {
+ /*
+ * There is already a dedicated and battery buffered
+ * RTCon &i2c1, so disable the pmic internal one.
+ */
+ compatible = "rockchip,rk808-rtc";
+ status = "disabled";
+ };
};
vdd_cpu: regulator at 40 {
@@ -469,12 +479,14 @@ &pcie30phy {
status = "okay";
};
+/* connects a JMicron AHCI SATA controller */
&pcie3x1 {
reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
+/* connects to the 2.5G network hardware for the upper network jack */
&pcie3x2 {
num-lanes = <1>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
@@ -554,6 +566,11 @@ &tsadc {
status = "okay";
};
+/*
+ * Connected to an MCU, e.g.
+ * stty -F /dev/ttyS0 115200; echo @C30 > /dev/ttyS0
+ * makes the machine beep.
+ */
&uart0 {
status = "okay";
};
diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c
index 5eda3c0dbbdf..db2b322ddba3 100644
--- a/drivers/mfd/rk8xx-core.c
+++ b/drivers/mfd/rk8xx-core.c
@@ -88,6 +88,7 @@ static const struct mfd_cell rk808s[] = {
.name = "rk808-rtc",
.num_resources = ARRAY_SIZE(rtc_resources),
.resources = rtc_resources,
+ .of_compatible = "rockchip,rk808-rtc",
},
};
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