RK3328 / Rock64 eMMC regression

[richard at kojedz.in]

Dear Bao,

Thanks for your response. Although these are deep technicals for me, 
I'll try to follow your instructions to debug the case. Does it matter 
in which order I'll try to remove recalc items? I'll need a day or two 
to finish with these, thanks for your patience. I'll report as soon as I 
can.

Regards,
Richard

2024-07-08 09:54 időpontban Huang-Huang Bao ezt írta:
> Hi richard,
> 
> So the 96903ed0e846 ("pinctrl: rockchip: fix pinmux bits for RK3328
> GPIO2-B pins") changed pinmux bits for GPIO2 B0-B3,B5-B6 from 2-bit
> width to 3-bit width.
> 
> Before the commit, we have the following pinmux bits, note the bit
> numbers in [start:end] are both inclusive.
> 
> GPIO2-B0: GRF_GPIO2BL_iomux[0:2]
> GPIO2-B1: GRF_GPIO2BL_iomux[3:5]
> GPIO2-B2: GRF_GPIO2BL_iomux[6:8]
> GPIO2-B3: GRF_GPIO2BL_iomux[9:11]
> GPIO2-B4: GRF_GPIO2BL_iomux[8:9] (unchanged)
> GPIO2-B5: GRF_GPIO2BH_iomux[0:2]
> GPIO2-B6: GRF_GPIO2BH_iomux[3:5]
> GPIO2-B7: GRF_GPIO2BH_iomux[0:2] (unchanged)
> 
> (GRF_GPIO2BL_iomux[0:11], GRF_GPIO2BH_iomux[0:5] are used)
> 
> Notice that there are conflicting pinmux bits within GPIO2-B2, GPIO2-B3
> and GPIO2-B4, and within GPIO2-B5 and GPIO2-B7. So this apparently 
> looks
> wrong.
> 
> After the commit, pinmux bits for these pins changed to
> 
> GPIO2-B0: GRF_GPIO2BL_iomux[0:1]
> GPIO2-B1: GRF_GPIO2BL_iomux[2:3]
> GPIO2-B2: GRF_GPIO2BL_iomux[4:5]
> GPIO2-B3: GRF_GPIO2BL_iomux[6:7]
> GPIO2-B4: GRF_GPIO2BL_iomux[8:9] (unchanged)
> GPIO2-B5: GRF_GPIO2BL_iomux[10:11]
> GPIO2-B6: GRF_GPIO2BL_iomux[12:13]
> GPIO2-B7: GRF_GPIO2BH_iomux[0:2] (unchanged)
> 
> (GRF_GPIO2BL_iomux[0:13], GRF_GPIO2BH_iomux[0:2] are used)
> 
> According to RK3328 datasheet, the eMMC pins of RK3328 are
> GPIO0_A7/EMMC_D0, GPIO2_D4/EMMC_D1, GPIO2_D5/EMMC_D2, GPIO3_C1/EMMC_D6,
> GPIO3_C2/EMMC_D7, GPIO3_C3/EMMC_CMD, GPIO3_C5/EMMC_CLKOUT and
> GPIO3_C6/EMMC_PWREN, which are not the subject of the commit. So I 
> don't
> know why these changes cause mmc module failure.
> 
> Comparing pinmux bits before and after the commit, the
> GRF_GPIO2BL_iomux[12:13] are being used and GRF_GPIO2BH_iomux[3:5] are
> no longer used. Maybe it's because the eMMC functionality depends on
> some of these bits to be set or not set?
> 
> The patch below is equivalent to revert 96903ed0e846 however is made
> easier to edit pinmux data for each pin. Try to apply the patch and
> reduce the changed items in rk3328_mux_recalced_data[] array as much as
> possible to figure out exactly which pinmux data fixed you issue.
> 
> 
> diff --git a/drivers/pinctrl/pinctrl-rockchip.c 
> b/drivers/pinctrl/pinctrl-rockchip.c
> index 3f56991f5b89..db835d7f053c 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c
> @@ -640,6 +640,48 @@ static struct rockchip_mux_recalced_data 
> rk3328_mux_recalced_data[] = {
>                 .reg = 0x28,
>                 .bit = 0,
>                 .mask = 0x7
> +       }, {
> +               /* gpio2_b0_sel 3-bit */
> +               .num = 2,
> +               .pin = 8,
> +               .reg = 0x24,
> +               .bit = 0,
> +               .mask = 0x7
> +       }, {
> +               /* gpio2_b1_sel 3-bit */
> +               .num = 2,
> +               .pin = 9,
> +               .reg = 0x24,
> +               .bit = 3,
> +               .mask = 0x7
> +       }, {
> +               /* gpio2_b2_sel 3-bit, conflicting gpio2_b4_sel */
> +               .num = 2,
> +               .pin = 10,
> +               .reg = 0x24,
> +               .bit = 6,
> +               .mask = 0x7
> +       }, {
> +               /* gpio2_b3_sel 3-bit, conflicting gpio2_b4_sel */
> +               .num = 2,
> +               .pin = 11,
> +               .reg = 0x24,
> +               .bit = 9,
> +               .mask = 0x7
> +       }, {
> +               /* gpio2_b5_sel 3-bit, conflicting gpio2_b7_sel */
> +               .num = 2,
> +               .pin = 13,
> +               .reg = 0x28,
> +               .bit = 0,
> +               .mask = 0x7
> +       }, {
> +               /* gpio2_b6_sel 3-bit */
> +               .num = 2,
> +               .pin = 14,
> +               .reg = 0x28,
> +               .bit = 3,
> +               .mask = 0x7
>         }, {
>                 /* gpio2_c7_sel */
>                 .num = 2,
> 
> 
> Bao
> 
> On 7/8/24 02:45, richard at kojedz.in wrote:
>> Dear developers,
>> 
>> I am using a Rock64 board with an emmc module. I've upgraded kernel
>> from 5.15.161 to .162, and since then the board wont boot up. Kernel
>> messages show:
>> 
>> [   49.117131] mmc1: switch to bus width 8 failed [   49.124709]
>> mmc1: mmc_select_hs200 failed, error -110 [   49.125190] mmc1: error
>> -110 whilst initialising MMC card [   49.139566] mmc_host mmc1: Bus
>> speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div =
>> 0) [  105.437111] mmc1: switch to bus width 8 failed [  105.446739]
>> mmc1: mmc_select_hs200 failed, error -110 [  105.447246] mmc1: error
>> -110 whilst initialising MMC card [  105.461639] mmc_host mmc1: Bus
>> speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div =
>> 0)
>> 
>> I am using rk3328-rock64.dts from the kernel.
>> 
>> Bisecting the kernel revealed 96903ed0e846 as first bad commit.
>> Reverting this commit on top of v5.15.162 makes my board bootup
>> again.
>> 
>> Can you please take a look?
>> 
>> Thanks in advance, Richard