[PATCH v3 2/6] dt-bindings: PCI: dwc: rockchip: Add optional dma interrupts
Bjorn Helgaas
helgaas at kernel.org
Wed Nov 1 15:23:28 PDT 2023
On Tue, Oct 31, 2023 at 03:51:03PM +0000, Niklas Cassel wrote:
> On Tue, Oct 31, 2023 at 04:10:17AM +0300, Serge Semin wrote:
> > On Fri, Oct 27, 2023 at 05:51:14PM +0200, Niklas Cassel wrote:
> > > However, e.g. rk3568 only has one channel for reads and one for writes.
> > > (Now this SoC doesn't have dedicated IRQs for the eDMA, but let's pretend
> > > that it did.)
> > >
> > > So for rk3568, it would then instead be:
> > > dma0: wr0
> > > dma1: rd0
> > > dma2: <unused>
> > > dma3: <unused>
> >
> > rk3568 doesn't have IRQs supplied in a normal way, as separate
> > signals. Instead they are combined in the 'sys' IRQ. So you should
> > define the IRQs constraint being device-specific by using for example
> > the "allOf: if-else" pattern.
>
> Thank you for your review comment.
>
> I agree. Will fix this in next version.
When you do, would you mind capitalizing "ATU", "DMA", etc in your
subject lines, commit logs, comments, etc? Then it'll be more obvious
that these aren't ordinary English words.
Bjorn
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