[PATCH 09/14] ARM: dts: rockchip: rv1126: Add PD_VO entry
Jagan Teki
jagan at edgeble.ai
Mon Jul 31 04:00:07 PDT 2023
PD_VO power-domain tree diagram in RV1126 is connected to
- BIU_VO
- VOP
- RGA
- IEP
- DSIHOST
Add PD_VO power-domain entry in RV1126.
Signed-off-by: Jagan Teki <jagan at edgeble.ai>
---
Cc: devicetree at vger.kernel.org
Cc: Rob Herring <robh+dt at kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt at linaro.org>
Cc: Conor Dooley <conor+dt at kernel.org>
arch/arm/boot/dts/rockchip/rv1126.dtsi | 39 ++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
index afa5a68f766f..4d74d3d998ab 100644
--- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
@@ -125,6 +125,26 @@ qos_sdio: qos at fe86c000 {
reg = <0xfe86c000 0x20>;
};
+ qos_iep: qos at fe8a0000 {
+ compatible = "rockchip,rv1126-qos", "syscon";
+ reg = <0xfe8a0000 0x20>;
+ };
+
+ qos_rga_rd: qos at fe8a0080 {
+ compatible = "rockchip,rv1126-qos", "syscon";
+ reg = <0xfe8a0080 0x20>;
+ };
+
+ qos_rga_wr: qos at fe8a0100 {
+ compatible = "rockchip,rv1126-qos", "syscon";
+ reg = <0xfe8a0100 0x20>;
+ };
+
+ qos_vop: qos at fe8a0180 {
+ compatible = "rockchip,rv1126-qos", "syscon";
+ reg = <0xfe8a0180 0x20>;
+ };
+
gic: interrupt-controller at feff0000 {
compatible = "arm,gic-400";
interrupt-controller;
@@ -170,6 +190,25 @@ power-domain at RV1126_PD_SDIO {
pm_qos = <&qos_sdio>;
#power-domain-cells = <0>;
};
+
+ power-domain at RV1126_PD_VO {
+ reg = <RV1126_PD_VO>;
+ clocks = <&cru ACLK_RGA>,
+ <&cru HCLK_RGA>,
+ <&cru CLK_RGA_CORE>,
+ <&cru ACLK_VOP>,
+ <&cru HCLK_VOP>,
+ <&cru DCLK_VOP>,
+ <&cru PCLK_DSIHOST>,
+ <&cru ACLK_IEP>,
+ <&cru HCLK_IEP>,
+ <&cru CLK_IEP_CORE>;
+ pm_qos = <&qos_rga_rd>,
+ <&qos_rga_wr>,
+ <&qos_vop>,
+ <&qos_iep>;
+ #power-domain-cells = <0>;
+ };
};
};
--
2.25.1
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