[RFC PATCH 2/3] arm64: dts: rockchip: rk356x: add LVDS bindings

[Johan Jonker]

On 9/23/22 18:01, Alibek Omarov wrote:
> Exposes ports for VOP2 and for panel
> 
> Signed-off-by: Alibek Omarov <a1ba.omarov at gmail.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk356x.dtsi | 25 ++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index 0473d7ee2668..fea3319a6a4e 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -787,6 +787,31 @@ hdmi_out: port at 1 {
>  		};
>  	};
> 

 
> +	lvds: lvds {
> +		compatible = "rockchip,rk3568-lvds";

Hi Alibek,

1:
In the manufacturer tree they model this node in the grf node.
Any particular reason to do that different?

https://github.com/rockchip-linux/kernel/blob/develop-5.10/arch/arm64/boot/dts/rockchip/rk3568.dtsi#L734

In mainline PX30 already does the same.

2:
There's complete "Acked" serie to be merged by Heiko for a LVDS yaml binding.

[PATCH v6 01/17] dt-bindings: display: rockchip: convert rockchip-lvds.txt to YAML
https://lore.kernel.org/linux-rockchip/67771143-fd83-383d-41b2-68e8707134e8@gmail.com/

Maybe it's better to check this node in a automated way?

Johan


> +		clocks = <&cru PCLK_DSITX_0>;
> +		clock-names = "pclk_lvds";
> +		phys = <&dsi_dphy0>;
> +		phy-names = "dphy";
> +		power-domains = <&power RK3568_PD_VO>;
> +		rockchip,grf = <&grf>;
> +		rockchip,output = "lvds";
> +		status = "disabled";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			lvds_in: port at 0 {
> +				reg = <0>;
> +			};
> +
> +			lvds_out: port at 1 {
> +				reg = <1>;
> +			};
> +		};
> +	};
> +
>  	qos_gpu: qos at fe128000 {
>  		compatible = "rockchip,rk3568-qos", "syscon";
>  		reg = <0x0 0xfe128000 0x0 0x20>;