[PATCH v3 0/3] drm/rockchip: dw_hdmi: Add 4k at 30 support

[Sascha Hauer]

It's been some time since I last sent this series. This version fixes
a regression Dan Johansen reported. The reason turned out to be simple,
I used the YUV420 register values instead of the RGB ones.

I realized that we cannot achieve several modes offered by my monitor
as these require pixelclocks that are slightly below the standard
pixelclocks. As these are lower than the standard clock rates the PLL
driver offers the clk driver falls back to a way lower frequency
which results in something the monitor can't display, so this series
now contains a patch to discard these unachievable modes.

Sascha

Changes since v2:
- Use correct register values for mpll_cfg
- Add patch to discard modes we cannot achieve

Changes since v1:
- Allow non standard clock rates only on Synopsys phy as suggested by
  Robin Murphy

Sascha Hauer (3):
  drm/rockchip: dw_hdmi: relax mode_valid hook
  drm/rockchip: dw_hdmi: Add support for 4k at 30 resolution
  drm/rockchip: dw_hdmi: discard modes with unachievable pixelclocks

 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 40 ++++++++++++++++-----
 1 file changed, 32 insertions(+), 8 deletions(-)

-- 
2.30.2