[RFC PATCH 2/4] rockchip: rk3288: enable uart2->usb redirection
Simon Glass
sjg at chromium.org
Wed Sep 28 03:20:35 PDT 2022
On Thu, 22 Sept 2022 at 00:47, Marty E. Plummer <hanetzer at startmail.com> wrote:
>
> Code snagged from rk3188's u-boot implementation and the linux kernel's
> implementation of rockchip.usb_uart=1
> Tested on rk3288-veyron-speedy
>
> patman/checkpatch.pl doesn't like my indentation here and I can't quite
> figure out what it actually wants.
> Complaint is:
> arch/arm/mach-rockchip/rk3288/rk3288.c:95: check: Alignment should match open parenthesis
> arch/arm/mach-rockchip/rk3288/rk3288.c:99: check: Alignment should match open parenthesis
> arch/arm/mach-rockchip/rk3288/rk3288.c:101: check: Alignment should match open parenthesis
> arch/arm/mach-rockchip/rk3288/rk3288.c:108: check: Alignment should match open parenthesis
>
> Signed-off-by: Marty E. Plummer <hanetzer at startmail.com>
> ---
>
> .../include/asm/arch-rockchip/grf_rk3288.h | 41 +++++++++++++++++++
> arch/arm/mach-rockchip/rk3288/rk3288.c | 20 +++++++++
> 2 files changed, 61 insertions(+)
>
Reviewed-by: Simon Glass <sjg at chromium.org>
(see below)
> diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
> index 894d3a40b0..d94cd9a27a 100644
> --- a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
> +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
> @@ -1152,4 +1152,45 @@ enum GPIO_BIAS {
> #define GPIO_PULL_MASK 0x3
> #define GPIO_PULL_SHIFT(x) ((x) * 2)
>
> +/* GRF_UOC_CON0 */
> +enum {
> + SIDDQ_SHIFT = 13,
> + SIDDQ_MASK = 1 << SIDDQ_SHIFT,
> +
> + UOC_DISABLE_SHIFT = 4,
> + UOC_DISABLE_MASK = 1 << UOC_DISABLE_SHIFT,
> +
> + COMMON_ON_N_SHIFT = 0,
> + COMMON_ON_N_MASK = 1 << COMMON_ON_N_SHIFT,
> +};
> +
> +/* GRF_UOC_CON2 */
> +enum {
> + SOFT_CON_SEL_SHIFT = 2,
> + SOFT_CON_SEL_MASK = 1 << SOFT_CON_SEL_SHIFT,
> +};
> +
> +/* GRF_UOC0_CON3 */
> +enum {
> + BYPASSSEL_SHIFT = 7,
> + BYPASSSEL_MASK = 1 << BYPASSSEL_SHIFT,
> +
> + BYPASSDMEN_SHIFT = 6,
> + BYPASSDMEN_MASK = 1 << BYPASSDMEN_SHIFT,
> +
> + TERMSEL_FULLSPEED_SHIFT = 5,
> + TERMSEL_FULLSPEED_MASK = 1 << TERMSEL_FULLSPEED_SHIFT,
> +
> + XCVRSELECT_SHIFT = 3,
> + XCVRSELECT_FSTRANSC = 1,
> + XCVRSELECT_MASK = 3 << XCVRSELECT_SHIFT,
> +
> + OPMODE_SHIFT = 1,
> + OPMODE_NODRIVING = 1,
> + OPMODE_MASK = 3 << OPMODE_SHIFT,
> +
> + SUSPENDN_SHIFT = 0,
> + SUSPENDN_MASK = 1 << SUSPENDN_SHIFT,
> +};
> +
> #endif
> diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
> index 3ad2887575..d9bb1add87 100644
> --- a/arch/arm/mach-rockchip/rk3288/rk3288.c
> +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
> @@ -89,6 +89,26 @@ int arch_cpu_init(void)
> rk_clrreg(&grf->soc_con0, 1 << 12);
>
> rk3288_qos_init();
> +
> + if (IS_ENABLED(CONFIG_ROCKCHIP_USB_UART)) {
> + rk_clrsetreg(&grf->uoc0_con[0],
> + SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
S shold line up with &
> + 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
> + 1 << COMMON_ON_N_SHIFT);
> + rk_clrsetreg(&grf->uoc0_con[2],
> + SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
> + rk_clrsetreg(&grf->uoc0_con[3],
> + OPMODE_MASK | XCVRSELECT_MASK |
> + TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
> + OPMODE_NODRIVING << OPMODE_SHIFT |
> + XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
> + 1 << TERMSEL_FULLSPEED_SHIFT |
> + 1 << SUSPENDN_SHIFT);
> + rk_clrsetreg(&grf->uoc0_con[3],
> + BYPASSSEL_MASK | BYPASSDMEN_MASK,
> + 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
> + }
> +
> #endif
>
> return 0;
> --
> 2.37.3
>
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