[PATCH v8 14/24] drm/rockchip: dw_hdmi: Set cur_ctr to 0 always
Sascha Hauer
s.hauer at pengutronix.de
Fri Mar 11 00:33:13 PST 2022
From: Douglas Anderson <dianders at chromium.org>
Jitter was improved by lowering the MPLL bandwidth to account for high
frequency noise in the rk3288 PLL. In each case MPLL bandwidth was
lowered only enough to get us a comfortable margin. We believe that
lowering the bandwidth like this is safe given sufficient testing.
Signed-off-by: Douglas Anderson <dianders at chromium.org>
Signed-off-by: Yakir Yang <ykk at rock-chips.com>
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
Notes:
Changes since v3:
- new patch
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 4f912cbea73bb..f56c79c60d149 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -181,20 +181,8 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
/* pixelclk bpp8 bpp10 bpp12 */
{
- 40000000, { 0x0018, 0x0018, 0x0018 },
- }, {
- 65000000, { 0x0028, 0x0028, 0x0028 },
- }, {
- 66000000, { 0x0038, 0x0038, 0x0038 },
- }, {
- 74250000, { 0x0028, 0x0038, 0x0038 },
- }, {
- 83500000, { 0x0028, 0x0038, 0x0038 },
- }, {
- 146250000, { 0x0038, 0x0038, 0x0038 },
- }, {
- 148500000, { 0x0000, 0x0038, 0x0038 },
- }, {
+ 600000000, { 0x0000, 0x0000, 0x0000 },
+ }, {
~0UL, { 0x0000, 0x0000, 0x0000},
}
};
--
2.30.2
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